Krzysztof Parzyszek via llvm-dev
2016-Nov-01 21:35 UTC
[llvm-dev] BoF: Debug info for optimized code.
On 11/1/2016 4:28 PM, Martin J. O'Riordan via llvm-dev wrote:> I do not even pretend to know much about Dwarf and the representation of debug information, but it does appear that there is little or no support for the idea that a single "instruction" can correspond to multiple diverse lines in the source file.There is. There is even a patch for LLVM: https://reviews.llvm.org/D16697 -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Martin J. O'Riordan via llvm-dev
2016-Nov-02 09:03 UTC
[llvm-dev] BoF: Debug info for optimized code.
Thanks Krzysztof, I hadn't noticed this. The patch refers to the target providing an 'op_index' register, but this seems like something that can only be handled by an integrated assembler. We use an external assembler and I am curious if there are new directives that we need to support for this? At the moment our assembler is unable to accept '.loc' directives between each operation in a VLIW instruction, is this something that we need to implement to get this level of VLIW debug support? Thanks, MartinO -----Original Message----- From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Krzysztof Parzyszek via llvm-dev Sent: 01 November 2016 21:35 To: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] BoF: Debug info for optimized code. On 11/1/2016 4:28 PM, Martin J. O'Riordan via llvm-dev wrote:> I do not even pretend to know much about Dwarf and the representation of debug information, but it does appear that there is little or no support for the idea that a single "instruction" can correspond to multiple diverse lines in the source file.There is. There is even a patch for LLVM: https://reviews.llvm.org/D16697 -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
Bruce Hoult via llvm-dev
2016-Nov-02 10:14 UTC
[llvm-dev] BoF: Debug info for optimized code.
That would certainly seem to be the conceptually simplest way to go: treat each operation in the VLIW instruction the same as a scalar instruction, and have ".loc" be able to address them. You'd then need a way to indicate to the debugger whether it is known correct to execute the operations sequentially instead of in parallel (I believe Itanium specifies that they is always true), or if they *must* be done in parallel to be correct e.g. "r1<-r2; r2<-r1" to swap values ("true" VLIW). Even when the architecture says the result is the same as if all operations were done in parallel from the same set of input registers, in practice many or most instructions will work correctly if the operations are executed sequentially, and it would be nice for debuggers to be able to do this for single-stepping -- and to be able to execute the operations in source program order, in the event they have been mixed up within the instruction (perhaps because each operation position is limited to certain operation types). So it would be useful to have some kind of "operation bundle" information, where each bundle is some arbitrary subset of the operations in the instruction, which *must* be executed in parallel. Note: this is somehow the opposite to another notion of "bundle| in VLIW, where it means "everything in a bundle MAY be executed in parallel, but different bundles MUST be executed sequentially". On Wed, Nov 2, 2016 at 12:03 PM, Martin J. O'Riordan via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Thanks Krzysztof, I hadn't noticed this. > > The patch refers to the target providing an 'op_index' register, but this > seems like something that can only be handled by an integrated assembler. > We use an external assembler and I am curious if there are new directives > that we need to support for this? At the moment our assembler is unable to > accept '.loc' directives between each operation in a VLIW instruction, is > this something that we need to implement to get this level of VLIW debug > support? > > Thanks, > > MartinO > > -----Original Message----- > From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of > Krzysztof Parzyszek via llvm-dev > Sent: 01 November 2016 21:35 > To: llvm-dev at lists.llvm.org > Subject: Re: [llvm-dev] BoF: Debug info for optimized code. > > On 11/1/2016 4:28 PM, Martin J. O'Riordan via llvm-dev wrote: > > I do not even pretend to know much about Dwarf and the representation of > debug information, but it does appear that there is little or no support > for the idea that a single "instruction" can correspond to multiple diverse > lines in the source file. > > There is. There is even a patch for LLVM: > https://reviews.llvm.org/D16697 > > -Krzysztof > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted > by The Linux Foundation _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161102/cee0f98a/attachment.html>
Krzysztof Parzyszek via llvm-dev
2016-Nov-02 15:14 UTC
[llvm-dev] BoF: Debug info for optimized code.
Hi Martin, Yes, the patch only changes the format of line information. There will be more work needed for fully implementing it across all tools. Here your concern still stands---more focus on debug information for VLIW architectures would be welcome. I was only pointing out that the necessary capacity of the debug information to carry this data does in fact exist, and that at least one step for getting it into LLVM has been attempted (the patch was reverted shortly after commit). -Krzysztof On 11/2/2016 4:03 AM, Martin J. O'Riordan via llvm-dev wrote:> Thanks Krzysztof, I hadn't noticed this. > > The patch refers to the target providing an 'op_index' register, but this seems like something that can only be handled by an integrated assembler. We use an external assembler and I am curious if there are new directives that we need to support for this? At the moment our assembler is unable to accept '.loc' directives between each operation in a VLIW instruction, is this something that we need to implement to get this level of VLIW debug support? > > Thanks, > > MartinO > > -----Original Message----- > From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Krzysztof Parzyszek via llvm-dev > Sent: 01 November 2016 21:35 > To: llvm-dev at lists.llvm.org > Subject: Re: [llvm-dev] BoF: Debug info for optimized code. > > On 11/1/2016 4:28 PM, Martin J. O'Riordan via llvm-dev wrote: >> I do not even pretend to know much about Dwarf and the representation of debug information, but it does appear that there is little or no support for the idea that a single "instruction" can correspond to multiple diverse lines in the source file. > > There is. There is even a patch for LLVM: > https://reviews.llvm.org/D16697 > > -Krzysztof > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Apparently Analagous Threads
- BoF: Debug info for optimized code.
- Proposal for O1/Og Optimization and Code Generation Pipeline
- Code coverage BoF - notes and updates
- [LLVMdev] [LoopVectorizer] Missed vectorization opportunities caused by sext/zext operations
- RFC for a design change in LoopStrengthReduce / ScalarEvolution