Rail Shafigulin via llvm-dev
2016-May-17 16:10 UTC
[llvm-dev] Struggling to define a simple instruction
Hi Sam. Thanks for the reply. This is not exactly what I was looking for. Say I have a loop that looks like this: sum = 0 for (i = 0; i < 4; i++) sum += (a[i] + b[i]) I would like a compiler to do the following: vector.load vector.r0, addressOfA vector.load vector.r1, addressOfB vector.add vector.r0, vector.r0, vector.r1 sumreduce gpr.r0, vector.r0 Another scenario is adding all the elements of the array (this is probably a better example) sum = 0 for (i = i; i < 4; i++) sum += a[i] would be converted to vector.load vector.r0, addressOfA sumreduce gpr.r0, vector.r0 If you can assist with this, I would greatly appreciate it. On Tue, May 17, 2016 at 2:57 AM, Sam Parker <Sam.Parker at arm.com> wrote:> Hi Rail, > > > If you want to reduce the elements of a vector to a scalar sum, isn't the > source operand a vector already? If this is the case, you'll want to > extract each element and then use the three adds, something like: > > > (add (add (add (extractelt VReg, 0), (extractelt VReg, 1)), (extractelt > VReg, 2)), (extractelt VReg, 3)) > > > cheers, > > sam > > > Sam Parker > > Graduate Engineer, Compilation Tools > > Development Solutions Group > ------------------------------ > *From:* llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Rail > Shafigulin via llvm-dev <llvm-dev at lists.llvm.org> > *Sent:* 16 May 2016 22:56:25 > *To:* llvm-dev > *Subject:* [llvm-dev] Struggling to define a simple instruction > > I'm trying to figure out how I can define and make LLVM target a simple > instruction. > > The instruction is very simple, it adds all of the elements of the vector > register. Lets' call it sum_reduce. > > Defining a vector add was simple. All I had to do is to simply change the > register type used by a regular add instruction and that was it. However > I'm really struggling to define this new instruction. > > Initially I thought that I would replace a chain of 3 adds with > insert_element instructions, but that defeats the purpose of sum_reduce, > since it would mean that I have to insert operators 4 times into a vector > register and then add everything. This turns it into more instructions than > the original chain of 3 adds. > > I've also looked at X86 HADD instructions but also have difficulty > understanding how to implement something similar to it in my target. > , > I've annoyed enough people on the LLVM IRC channel. And they have been > really helpful, unfortunately I feel that if I ask more they'll stop > answering completely :D > > At this point I wouldn't mind some handholding. I can provide more code > if needed > > Any help on the issue is really appreciated. > > -- > Rail Shafigulin > Software Engineer > Esencia Technologies > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. >-- Rail Shafigulin Software Engineer Esencia Technologies -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160517/efbfd8bb/attachment.html>