Mat Hostetter
2015-Mar-15 19:23 UTC
[LLVMdev] suggested x86 peephole optimization: use bit rotate to save one instruction during mask creation
This kind of pattern is very common when dealing with bit arrays: unsigned long clear_mask(int bit) { return ~(1UL << bit); } clang 3.6 at -O3 compiles this in the straightforward way, moving 1 into register, shifting it, then flipping all the bits: movl $1, %eax movb %dil, %cl shlq %cl, %rax notq %rax gcc 4.8.2, however, is more clever. It moves -2, i.e. ~1, into a register then rotates that into place, saving one instruction: movl %edi, %ecx movq $-2, %rax rolq %cl, %rax -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150315/9130dcb4/attachment.html>
David Majnemer
2015-Mar-15 22:03 UTC
[LLVMdev] suggested x86 peephole optimization: use bit rotate to save one instruction during mask creation
A fix is out for review here: http://reviews.llvm.org/D8350 On Sun, Mar 15, 2015 at 12:23 PM, Mat Hostetter <mjhostetter at gmail.com> wrote:> This kind of pattern is very common when dealing with bit arrays: > > unsigned long clear_mask(int bit) > { > return ~(1UL << bit); > } > > clang 3.6 at -O3 compiles this in the straightforward way, moving 1 into > register, shifting it, then flipping all the bits: > > movl $1, %eax > movb %dil, %cl > shlq %cl, %rax > notq %rax > > gcc 4.8.2, however, is more clever. It moves -2, i.e. ~1, into a register > then rotates that into place, saving one instruction: > > movl %edi, %ecx > movq $-2, %rax > rolq %cl, %rax > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150315/762c5d96/attachment.html>