Daniel Sanders
2015-Mar-03 12:01 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
Hi, I'm trying to implement the ZC inline assembly constraint for Mips. This constraint is a memory constraint that expands to an address with an offset (the range of the offset varies according to the subtarget), so the inline assembly in: int data[10]; void ZC(void) { asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); } Should expand to something like: foo 4($2) 8($2) At the moment, the best I can get is something like: foo 0($2) 0($3) with the offsets being added before the inline assembly. Does anyone have any suggestions as to how I can get the offset inside the inline assembly? Thanks Daniel Sanders Leading Software Design Engineer, MIPS Processor IP Imagination Technologies Limited www.imgtec.com<http://www.imgtec.com/> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150303/050ca238/attachment.html>
Krzysztof Parzyszek
2015-Mar-03 14:35 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
On 3/3/2015 6:01 AM, Daniel Sanders wrote:> Hi, > > I'm trying to implement the ZC inline assembly constraint for Mips. This > constraint is a memory constraint that expands to an address with an > offset (the range of the offset varies according to the subtarget), so > the inline assembly in: > > int data[10]; > > void ZC(void) { > > asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); > > } > > Should expand to something like: > > foo 4($2) 8($2) > > At the moment, the best I can get is something like: > > foo 0($2) 0($3) > > with the offsets being added before the inline assembly. > > Does anyone have any suggestions as to how I can get the offset inside > the inline assembly?How are you actually getting this to compile? I just built clang and I'm getting an error: clang-3.6 -target mips -S mipsa.c mipsa.c:4:33: error: invalid input constraint 'ZC' in asm asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); ^ 1 error generated. It doesn't seem that the function "validateAsmConstraint" in tools/clang/lib/Basic/Targets.cpp handles "ZC" as a constraint. -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Tim Northover
2015-Mar-03 14:42 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
> Does anyone have any suggestions as to how I can get the offset inside the > inline assembly?I think x86 has the same capability with a simple "m" constraint. Looks like it's based on the "SelectInlineAsmMemoryOperand" function. Cheers. Tim.
Daniel Sanders
2015-Mar-03 16:23 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
> -----Original Message----- > From: Tim Northover [mailto:t.p.northover at gmail.com] > Sent: 03 March 2015 14:42 > To: Daniel Sanders > Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) > Subject: Re: [LLVMdev] Inline Assembly: Memory constraints with offsets > > > Does anyone have any suggestions as to how I can get the offset inside the > > inline assembly? > > I think x86 has the same capability with a simple "m" constraint. > Looks like it's based on the "SelectInlineAsmMemoryOperand" function. > > Cheers. > > Tim.Thanks. I came across SelectInlineAsmMemoryOperand but the caller I found is passing a hardcoded 'm' into it. I'll start by seeing if the 'o' and 'v' paths really trigger for X86.
Daniel Sanders
2015-Mar-04 16:30 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Krzysztof Parzyszek > Sent: 03 March 2015 14:35 > To: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Inline Assembly: Memory constraints with offsets > > On 3/3/2015 6:01 AM, Daniel Sanders wrote: > > Hi, > > > > I'm trying to implement the ZC inline assembly constraint for Mips. This > > constraint is a memory constraint that expands to an address with an > > offset (the range of the offset varies according to the subtarget), so > > the inline assembly in: > > > > int data[10]; > > > > void ZC(void) { > > > > asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); > > > > } > > > > Should expand to something like: > > > > foo 4($2) 8($2) > > > > At the moment, the best I can get is something like: > > > > foo 0($2) 0($3) > > > > with the offsets being added before the inline assembly. > > > > Does anyone have any suggestions as to how I can get the offset inside > > the inline assembly? > > How are you actually getting this to compile? I just built clang and > I'm getting an error: > > clang-3.6 -target mips -S mipsa.c > mipsa.c:4:33: error: invalid input constraint 'ZC' in asm > asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); > ^ > 1 error generated. > > > It doesn't seem that the function "validateAsmConstraint" in > tools/clang/lib/Basic/Targets.cpp handles "ZC" as a constraint. > > -KrzysztofPartial support for ZC is in my working copy at the moment. I've attached my WIP patches.> -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > hosted by The Linux Foundation > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-------------- next part -------------- A non-text attachment was scrubbed... Name: clang-implement-ZC.patch Type: application/octet-stream Size: 1177 bytes Desc: clang-implement-ZC.patch URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150304/e20afa8e/attachment.obj> -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-implement-ZC.patch Type: application/octet-stream Size: 975 bytes Desc: llvm-implement-ZC.patch URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150304/e20afa8e/attachment-0001.obj>
Daniel Sanders
2015-Mar-04 16:42 UTC
[LLVMdev] Inline Assembly: Memory constraints with offsets
> -----Original Message----- > From: Daniel Sanders > Sent: 03 March 2015 16:23 > To: 'Tim Northover' > Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) > Subject: RE: [LLVMdev] Inline Assembly: Memory constraints with offsets > > > -----Original Message----- > > From: Tim Northover [mailto:t.p.northover at gmail.com] > > Sent: 03 March 2015 14:42 > > To: Daniel Sanders > > Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) > > Subject: Re: [LLVMdev] Inline Assembly: Memory constraints with offsets > > > > > Does anyone have any suggestions as to how I can get the offset inside > the > > > inline assembly? > > > > I think x86 has the same capability with a simple "m" constraint. > > Looks like it's based on the "SelectInlineAsmMemoryOperand" function. > > > > Cheers. > > > > Tim. > > Thanks. I came across SelectInlineAsmMemoryOperand but the caller I found > is passing a hardcoded 'm' into it. I'll start by seeing if the 'o' and 'v' paths > really trigger for X86.It turns out that those paths don't trigger. I've made a small change to print the ConstraintCode when this function is called and found that the following code: int data[10]; void o(void) { asm volatile ("foo %0" : : "o"(data[1])); } // The 'v' case is commented out because clang doesn't actually accept it in the frontend despite having a backend implementation. //void v(void) { // asm volatile ("foo %0" : : "v"(data[1])); //} void m(void) { asm volatile ("foo %0" : : "m"(data[1])); } when compiled for X86, only prints 'm' during compilation and never 'o'. It appears that only 'm' and equivalent constraints can be implemented. I think the 'm' is hardcoded because the constraints aren't present in the SelectionDAG nodes and I think they're not present because it's difficult to represent them. I expect the 'm' was good enough at the time and Mips might be the first target to need sufficiently complicated constraints for it to be a problem. I'll have to have a think as to how I can deliver the constraint code to this function nicely.
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