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e20afa8e
2015 Mar 04
2
[LLVMdev] Inline Assembly: Memory constraints with offsets
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2015 Mar 03
5
[LLVMdev] Inline Assembly: Memory constraints with offsets
Hi,
I'm trying to implement the ZC inline assembly constraint for Mips. This constraint is a memory constraint that expands to an address with an offset (the range of the offset varies according to the subtarget), so the inline assembly in:
int data[10];
void ZC(void) {
asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2]));
}
Should expand to