llvm dev - Aug 2013 - [LLVMdev] PrescheduleNodesWithMultipleUses() probable mistake.

Hi,

At the moment the same test is being ran twice - same output so pointless!
I believe this may not be what was intended.
The change below runs the virtual register test the second time on the
Predecessor SUnit.

Robert

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index f5fe168..6e888da
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -2850,7 +2850,7 @@ void
RegReductionPQBase::PrescheduleNodesWithMultipleUses() {
       continue;
     // Avoid prescheduling to copies from virtual registers, which don't
behave
     // like other nodes from the perspective of scheduling heuristics.
-    if (SDNode *N = SU->getNode())
+    if (SDNode *N = PredSU->getNode())
       if (N->getOpcode() == ISD::CopyFromReg &&
           TargetRegisterInfo::isVirtualRegister
             (cast<RegisterSDNode>(N->getOperand(1))->getReg()))
~
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Dan,

You wrote this code...What do you think? :-)

-bw

On Aug 21, 2013, at 11:35 AM, Robert Lytton <robert at xmos.com> wrote:
> Hi,
> 
> At the moment the same test is being ran twice - same output so pointless!
> I believe this may not be what was intended.
> The change below runs the virtual register test the second time on the
Predecessor SUnit.
> 
> Robert
> 
> diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> index f5fe168..6e888da
> --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> @@ -2850,7 +2850,7 @@ void
RegReductionPQBase::PrescheduleNodesWithMultipleUses() {
>        continue;
>      // Avoid prescheduling to copies from virtual registers, which
don't behave
>      // like other nodes from the perspective of scheduling heuristics.
> -    if (SDNode *N = SU->getNode())
> +    if (SDNode *N = PredSU->getNode())
>        if (N->getOpcode() == ISD::CopyFromReg &&
>            TargetRegisterInfo::isVirtualRegister
>             
(cast<RegisterSDNode>(N->getOperand(1))->getReg()))
> ~
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