search for: regreductionpqbase

...emental change to the existing code makes sense. The two implementations could live side-by-side for a while if that makes sense. The existing RegReduction scheduler design goes something like this: SchedulingPriorityQueue ^ | RegReductionPQBase ^ | RegReductionPriorityQueue<SF> ^ /|\ ______/ | \______ | | | Heuristic 1...

...on the Predecessor SUnit. Robert diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index f5fe168..6e888da --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -2850,7 +2850,7 @@ void RegReductionPQBase::PrescheduleNodesWithMultipleUses() { continue; // Avoid prescheduling to copies from virtual registers, which don't behave // like other nodes from the perspective of scheduling heuristics. - if (SDNode *N = SU->getNode()) + if (SDNode *N = PredSU->getNode())...

...bounds ([16 x [17 x float]] addrspace(3)* @sgemm.b, i32 0, i32 0, i32 1), align 4 %42 = call float @llvm.fmuladd.f32(float %37, float %41, float %c1.036) nounwind ... and 254 more of these pairs. %39 and %41 (and 254 more loads) are dead after they are used in the immediately following fmuladd. RegReductionPQBase::getNodePriority() (in CodeGen/SelectionDAG/ScheduleDAGRRList.cpp) normally returns the SethiUllmanNumber for a node, but there's a few special cases. ISD::TokenFactor and ISD::CopyToReg return a 0, to push them closer to their uses, and similarly for TargetOpcode::EXTRACT_SUBREG, TargetOpcode:...