llvm dev - Feb 2013 - [LLVMdev] Post Register-Allocation Instruction Scheduling and Instruction Encodings

Hello,

I have two questions I want to ask.
The first one, where is the post register allocation instruction scheduler
function is called, and whether it could be called for both x86 and MIPS ?
The second question, is it possible to get the complete binary representation of
some instruction (<= 32-bit binary encoding) for both x86 and MIPS in post
register allocation instruction scheduler, and if yes how is that done ?

Thanks,
    Jafar Jamal. 
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