llvm dev - Nov 2011 - [LLVMdev] 40-bit integer registers

Hi all!

Our target (a non-public DSP) has 40-bit integer registers, and our C 
front-end support 40-bit integers (ie our LLVM assembler use i40 types).

It seems as every native type should be added as a Machine Value Type 
(MVT). However, it also seems to be required that each SimpleValueType 
enum in MVT has a bit-width that is a power of 2.

Do any of you have ideas how to add support for MVT::i40?

Regards,
Patrik Hägglund

Hi Patrik,
> Our target (a non-public DSP) has 40-bit integer registers, and our C
> front-end support 40-bit integers (ie our LLVM assembler use i40 types).
>
> It seems as every native type should be added as a Machine Value Type
> (MVT). However, it also seems to be required that each SimpleValueType
> enum in MVT has a bit-width that is a power of 2.
>
> Do any of you have ideas how to add support for MVT::i40?
this has come up before (with 24 bit types IIRC), so I suggest you search the
mailing lists.  The LegalizeTypes infrastructure would need some work, since
for example it currently thinks an i33 type should be promoted to a power of
two bitwidth (i.e. to i64) before being split, while now it should be promoted
to a power-of-two multiple of a legal bitwidth (in this example to i40).  There
are some other issues too, but nothing too hard IMO.

Ciao, Duncan.