Ralf Karrenberg <Chareos at gmx.de> writes:
> This sounds great!
>
> For my case, I only require some basic support, so I am optimistic
> that your next few patches will provide everything I need.
If my evil plan works out, within the next 10 or so patches we should be
in a place where pushing everything up goes pretty quickly. It's about
8 TableGen patches and then a patch to do ADD or some other simple thing
like that to start the so-called SIMD reorg. Basically, if I can get
the SIMD reorg patch settled, everything after that is really simple
because it all looks uniform. Of course, that reorg/ADD patch is going
to cause a lot of discussion, I suspect. ;)
>>> There seems to be some code for this because
>>> xor<8 x i32> %m, %m
>>> works, probably because it can get rid of all bitcasts.
>>
>> And it can use xorps to implement the operation.
>
> Yes, that makes sense. But why does the same not work with "and"
and
> "or" (-> VANDPS/VORPS) ?
It can. Maybe the pattern for ANDPS isn't there yet. I'd have to dig
deeper into the failure. The fact that there are inconsistencies like
this is one of the motivations behind the SIMD reorg. There are plenty
of such inconsistencies in the existing SSE spec. Hopefully after the
reorg, implementing a pattern like VANDPS given an existing one for
VXORPS is trivial.
> Anyway, I am looking forward to testing your patches.
So am I. :)
> Would it be possible to send around a notification when the stuff goes
> upstream?
> Thanks a lot :).
I try to put [AVX] in the subject of patch mailings (to -commits) and
commit messages. Once in a while I forget. I'll try to remeber to send
semething to -dev when major stuff appears.
-Dave