llvm dev - Mar 2011 - [LLVMdev] new vector resize instruction could be useful

Hi!

If I build a vector of some length (e.g. 4) from a vector of another 
length (e.g. 3)
then I get tons of extractelement and insertelement instructions. since
vectors of length 3 and 4 both map to an sse register it could be useful to
introduce an instruction that changes the length of a vector, either 
truncating
or extending by zero or undef values (whichever makes more sense).
for lengths 3 and 4 this maps to no-op but could be useful for e.g. 
concatenating
two vectors of length 8 to a vector of length 16 by first resizing to 
length 16
and then using shufflevector.
what do you think?

-jochen

On Fri, Mar 18, 2011 at 3:43 PM, Jochen Wilhelmy <j.wilhelmy at arcor.de>
wrote:
> Hi!
>
> If I build a vector of some length (e.g. 4) from a vector of another
> length (e.g. 3)
> then I get tons of extractelement and insertelement instructions. since
> vectors of length 3 and 4 both map to an sse register it could be useful to
> introduce an instruction that changes the length of a vector, either
> truncating
> or extending by zero or undef values (whichever makes more sense).
> for lengths 3 and 4 this maps to no-op but could be useful for e.g.
> concatenating
> two vectors of length 8 to a vector of length 16 by first resizing to
> length 16
> and then using shufflevector.
> what do you think?
You should already be able to use shufflevector with the output length
different from the inputs.

-Eli

> You should already be able to use shufflevector with the output length
> different from the inputs.
ah, that's cool

-Jochen