llvm dev - Sep 2010 - [LLVMdev] Thumb categorizing TST wrongly

I see strangeness on Thumb TST (tTST) predicate 'isCompare'

It is true for regular ARM, false for Thumb:

(gdb) p MI->dump()
   TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% 
reg16397
$24 = void
(gdb) p MI->getDesc().isCompare()
$25 = true


(gdb) p MI->dump()
   tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;  
tGPR:%reg16396,16397
$22 = void
(gdb) p MI->getDesc().isCompare()
$23 = false


Is this intentional or just an oversight? In latter case how do I fix  
it? Tablegen input?

Thanks and cheers,

	Gabor

On Sep 14, 2010, at 12:09 PM, Gabor Greif wrote:
> I see strangeness on Thumb TST (tTST) predicate 'isCompare'
> 
> It is true for regular ARM, false for Thumb:
> 
> (gdb) p MI->dump()
>   TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% 
> reg16397
> $24 = void
> (gdb) p MI->getDesc().isCompare()
> $25 = true
> 
> 
> (gdb) p MI->dump()
>   tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;  
> tGPR:%reg16396,16397
> $22 = void
> (gdb) p MI->getDesc().isCompare()
> $23 = false
> 
> 
> Is this intentional or just an oversight? In latter case how do I fix  
> it? Tablegen input?
Oversight I think, and it needs to be fixed with isCompare around the relevant
patterns (ARM mode doesn't see this since isCompare is in the multiclass).

-eric

On Sep 14, 2010, at 1:46 PM, Eric Christopher wrote:
> On Sep 14, 2010, at 12:09 PM, Gabor Greif wrote:
> 
>> I see strangeness on Thumb TST (tTST) predicate 'isCompare'
>> 
>> It is true for regular ARM, false for Thumb:
>> 
>> (gdb) p MI->dump()
>>  TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% 
>> reg16397
>> $24 = void
>> (gdb) p MI->getDesc().isCompare()
>> $25 = true
>> 
>> 
>> (gdb) p MI->dump()
>>  tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;
>> tGPR:%reg16396,16397
>> $22 = void
>> (gdb) p MI->getDesc().isCompare()
>> $23 = false
>> 
>> 
>> Is this intentional or just an oversight? In latter case how do I fix  
>> it? Tablegen input?
> 
> Oversight I think, and it needs to be fixed with isCompare around the
relevant patterns (ARM mode doesn't see this since isCompare is in the
multiclass).
> 
Semi-intentional oversight. :-) I was more interested in Thumb2 and ARM.

-bw