Displaying 5 results from an estimated 5 matches for "tstri".
2010 Sep 14
2
[LLVMdev] Thumb categorizing TST wrongly
I see strangeness on Thumb TST (tTST) predicate 'isCompare'
It is true for regular ARM, false for Thumb:
(gdb) p MI->dump()
TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:%
reg16397
$24 = void
(gdb) p MI->getDesc().isCompare()
$25 = true
(gdb) p MI->dump()
tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;
tGPR:%reg16396,16397
$22 = void
(gdb) p MI->getDesc().isCompare()...
2017 Oct 09
4
{ARM} IfConversion does not detect BX instruction as a branch
...t; = LDRBi12 %R7, 0, pred:14, pred:%noreg; mem:LD1[%15](align=4)
> %R3<def> = EORri %R6, 254, pred:14, pred:%noreg, opt:%noreg
> %R3<def> = ANDrr %R3<kill>, %R6<kill>, pred:14, pred:%noreg, opt:%noreg
> %R6<def> = MOVi 0, pred:14, pred:%noreg, opt:%noreg
> TSTri %R3<kill>, 255, pred:14, pred:%noreg, %CPSR<imp-def>;
> Bcc <BB#9>, pred:0, pred:%CPSR<kill>;
>
> BB#8:
> Live Ins: %LR %R0 %R1 %R2 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R12
> Predecessors according to CFG: BB#7
> STRi12 %R6, %R7<kill>, 4, pred:14, pred:%n...
2010 Sep 14
0
[LLVMdev] Thumb categorizing TST wrongly
On Sep 14, 2010, at 12:09 PM, Gabor Greif wrote:
> I see strangeness on Thumb TST (tTST) predicate 'isCompare'
>
> It is true for regular ARM, false for Thumb:
>
> (gdb) p MI->dump()
> TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:%
> reg16397
> $24 = void
> (gdb) p MI->getDesc().isCompare()
> $25 = true
>
>
> (gdb) p MI->dump()
> tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;
> tGPR:%reg16396,16397
>...
2017 Oct 11
2
{ARM} IfConversion does not detect BX instruction as a branch
...2 %R7, 0, pred:14, pred:%noreg; mem:LD1[%15](align=4)
> %R3<def> = EORri %R6, 254, pred:14, pred:%noreg, opt:%noreg
> %R3<def> = ANDrr %R3<kill>, %R6<kill>, pred:14, pred:%noreg, opt:%noreg
> %R6<def> = MOVi 0, pred:14, pred:%noreg, opt:%noreg
> TSTri %R3<kill>, 255, pred:14, pred:%noreg, %CPSR<imp-def>;
> Bcc <BB#9>, pred:0, pred:%CPSR<kill>;
>
>
> BB#8:
> Live Ins: %LR %R0 %R1 %R2 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R12
> Predecessors according to CFG: BB#7
> STRi12 %R6, %R7<kill>, 4, pr...
2010 Sep 15
0
[LLVMdev] LLVMdev Digest, Vol 75, Issue 32
...t;7EABAC00-FD22-4757-8F8B-9FFEF5AD5767 at mac.com>
> Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed
>
> I see strangeness on Thumb TST (tTST) predicate 'isCompare'
>
> It is true for regular ARM, false for Thumb:
>
> (gdb) p MI->dump()
> TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:%
> reg16397
> $24 = void
> (gdb) p MI->getDesc().isCompare()
> $25 = true
>
>
> (gdb) p MI->dump()
> tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>;
> tGPR:%reg16396,16397
> $22...