search for: reg16396

...geness on Thumb TST (tTST) predicate 'isCompare' It is true for regular ARM, false for Thumb: (gdb) p MI->dump() TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% reg16397 $24 = void (gdb) p MI->getDesc().isCompare() $25 = true (gdb) p MI->dump() tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>; tGPR:%reg16396,16397 $22 = void (gdb) p MI->getDesc().isCompare() $23 = false Is this intentional or just an oversight? In latter case how do I fix it? Tablegen input? Thanks and cheers, Gabor

...GR16:%reg16398,16387 %reg16398<def> = XOR16rr %reg16398, %reg16386, %EFLAGS<imp-def>; GR16:%reg16398,16386 %reg16397<def> = COPY %reg16398; GR16:%reg16397,16398 %reg16397<def> = XOR16ri %reg16397, 32767, %EFLAGS<imp-def>; GR16:%reg16397 %reg16396<def> = COPY %reg16397; GR16:%reg16396,16397 %reg16396<def> = AND16rr %reg16396, %reg16386, %EFLAGS<imp-def>; GR16:%reg16396,16386 %reg16394<def> = COPY %reg16396; GR16:%reg16394,16396 %reg16394<def> = SHL16ri %reg16394, 1, %EFLAGS<imp-def>...

...> It is true for regular ARM, false for Thumb: > > (gdb) p MI->dump() > TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% > reg16397 > $24 = void > (gdb) p MI->getDesc().isCompare() > $25 = true > > > (gdb) p MI->dump() > tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>; > tGPR:%reg16396,16397 > $22 = void > (gdb) p MI->getDesc().isCompare() > $23 = false > > > Is this intentional or just an oversight? In latter case how do I fix > it? Tablegen input? Oversight I think, and it...

On Sep 21, 2010, at 2:45 PMPDT, John Thompson wrote: > fatal error: error in backend: Ran out of registers during register allocation! > Please check your inline asm statement for invalid constraints: > INLINEASM <es:>, 0, 10, %reg16396<def>, 10, %reg16397<def>, 10, %reg16398<def>, 10, %reg16399<def>, 10, %reg16400<def>, 10, %reg16401<def>,10, %reg16402<def>, 10, %reg16403<def>, 10, %reg16404<def>, 10, %reg16405<def>, 10, %reg16406<def>, 10, %reg16407<def>, 21...

...pr20314-2.c file now compiles on my 64-bit Linux box. However, it still has a problem on 32-bit Windows and 32-bit Linux: fatal error: error in backend: Ran out of registers during register allocation! Please check your inline asm statement for invalid constraints: INLINEASM <es:>, 0, 10, %reg16396<def>, 10, %reg16397<def>, 10, %reg16398<def>, 10, %reg16399<def>, 10, %reg16400<def>, 10, %reg16401<def>,10, %reg16402<def>, 10, %reg16403<def>, 10, %reg16404<def>, 10, %reg16405<def>, 10, %reg16406<def>, 10, %reg16407<def>, 21...

On Sep 20, 2010, at 9:40 PMPDT, John Thompson wrote: > Thanks, Stuart. Sorry, I had some left-over editing cruft in my email. From Googling runtest, I had found dejagnu, which I'd heard some folks were using over there, so I used the local package manager to install it. But from what you said I went ahead and got the dejagnu sources and built it, but had problems in running make

...gt; > It is true for regular ARM, false for Thumb: > > (gdb) p MI->dump() > TSTri %reg16397, 3, pred:14, pred:%reg0, %CPSR<imp-def>; GPR:% > reg16397 > $24 = void > (gdb) p MI->getDesc().isCompare() > $25 = true > > > (gdb) p MI->dump() > tTST %reg16396, %reg16397, pred:14, pred:%reg0, %CPSR<imp-def>; > tGPR:%reg16396,16397 > $22 = void > (gdb) p MI->getDesc().isCompare() > $23 = false > > > Is this intentional or just an oversight? In latter case how do I fix > it? Tablegen input? > > Thanks and cheers, >...

Thanks, Stuart. Sorry, I had some left-over editing cruft in my email. >From Googling runtest, I had found dejagnu, which I'd heard some folks were using over there, so I used the local package manager to install it. But from what you said I went ahead and got the dejagnu sources and built it, but had problems in running make install, which is trying to put it /usr/local/bin rather than