llvm dev - May 2010 - [LLVMdev] Scope of JIT implementation for the target?

I see that JIT isn't supported for the Sparc targets for example.
What is the scope of the change to add JIT support.

I see, for example, that for X86 target class X86JITInfo is defined with 
10 methods. It's only used in one place: setPICBase. Also 
createX86JITCodeEmitterPass creates JIT pass -- very simple.

So is implementing these steps enough to add JIT, or there are some 
hidden difficulties that aren't obvious?

Yuri

On May 8, 2010, at 12:45 PM, Yuri wrote:
> I see that JIT isn't supported for the Sparc targets for example.
> What is the scope of the change to add JIT support.
> 
> I see, for example, that for X86 target class X86JITInfo is defined with 
> 10 methods. It's only used in one place: setPICBase. Also 
> createX86JITCodeEmitterPass creates JIT pass -- very simple.
> 
> So is implementing these steps enough to add JIT, or there are some 
> hidden difficulties that aren't obvious?
The biggest piece is adding hooks for instruction encoding.  Sparc should be
mostly autogenerated from the .td files like the PPC backend, so take a look at
lib/Target/PowerPC/PPCCodeEmitter.cpp.

However, in the mid-term, we're planning on eliminating the JIT target
interfaces as they are now and replacing them with an MC implementation.   If
you're interested in getting the JIT up, I'd strongly suggest working on
converting the sparc backend to start using the MC interfaces (e.g. switch
SparcAsmPrinter.cpp to print instructions by lowering them to MCInst, then add a
new SparcMCInstPrinter interface).  There is some information about MC here:
http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.html and I'm happy to
answer any questions about it.

-Chris