llvm dev - Apr 2010 - [LLVMdev] Fix wrong x86 inst encoding / problem with disassembler

Hello

I think I found a bug in the x86 instruction definition file, while trying
out the disassembler.

It looks like the "ADD32rr_alt" instruction should have GR32 operands,
not
GR16.

Attached you can find a patch, which should fix the problem.


But even with the change I can not decode e.g. "0x03 0xC1"  (should be
"addl    %ecx, %eax") only if I remove the "isCodeGenOnly =
1" line it
works.
Looking for help.

-- Marius Wachtler
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20100405/2c731c58/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: fix_ADD32rr_alt_enc.diff
Type: application/octet-stream
Size: 647 bytes
Desc: not available
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20100405/2c731c58/attachment.obj>

Patch committed as 100480. Thanks.

Evan

On Apr 5, 2010, at 1:44 PM, Marius Wachtler wrote:
> Hello
> 
> I think I found a bug in the x86 instruction definition file, while trying
out the disassembler.
> 
> It looks like the "ADD32rr_alt" instruction should have GR32
operands, not GR16.
> 
> Attached you can find a patch, which should fix the problem.
> 
> 
> But even with the change I can not decode e.g. "0x03 0xC1" 
(should be "addl    %ecx, %eax") only if I remove the
"isCodeGenOnly = 1" line it works.
> Looking for help.
> 
> -- Marius Wachtler
>
<fix_ADD32rr_alt_enc.diff>_______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev