Hi. I have a very quick question. Is the instruction cache flushed by the llvm jit before code in memory is written to or executed? I'm assuming so, but I can't find where in the source code this is happening. In particular I searched for clflush, invd, and wbinvd instructions, but couldn't find them. And if it's not necessary to do this, can you please explain why? (I'm assuming the target platform has a separate L1 i-cache). Thanks. - Shasank _________________________________________________________________ Hotmail: Powerful Free email with security by Microsoft. http://clk.atdmt.com/GBL/go/201469230/direct/01/ -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100306/a9b57f0b/attachment.html>
On Sat, Mar 6, 2010 at 10:34 PM, Shasank Chavan <shanko_chavano at hotmail.com> wrote:> Hi. I have a very quick question. Is the instruction cache flushed by the > llvm jit before code in memory is written to or executed? I'm assuming so, > but I can't find where in the source code this is happening. In particular > I searched for clflush, invd, and wbinvd instructions, but couldn't find > them. And if it's not necessary to do this, can you please explain why? > (I'm assuming the target platform has a separate L1 i-cache). Thanks.In general, yes. It's possible there are cases we've missed (I fixed one in the last couple months), in which case please let us know. The actual code is in sys::Memory::InvalidateInstructionCache (http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Memory.cpp?view=markup), called by, for example, lib/Target/PowerPC/PPCJITInfo.cpp:PPCCompilationCallbackC().
On Sat, Mar 6, 2010 at 10:34 PM, Shasank Chavan <shanko_chavano at hotmail.com> wrote:> Hi. I have a very quick question. Is the instruction cache flushed by the > llvm jit before code in memory is written to or executed? I'm assuming so, > but I can't find where in the source code this is happening. In particular > I searched for clflush, invd, and wbinvd instructions, but couldn't find > them. And if it's not necessary to do this, can you please explain why? > (I'm assuming the target platform has a separate L1 i-cache). Thanks.On x86 in particular, explicitly flushing the instruction cache isn't necessary; the processor transparently handles modifications to cached code. -Eli
On Mar 6, 2010, at 11:19 PM, Eli Friedman wrote:> On Sat, Mar 6, 2010 at 10:34 PM, Shasank Chavan > <shanko_chavano at hotmail.com> wrote: >> Hi. I have a very quick question. Is the instruction cache flushed by the >> llvm jit before code in memory is written to or executed? I'm assuming so, >> but I can't find where in the source code this is happening. In particular >> I searched for clflush, invd, and wbinvd instructions, but couldn't find >> them. And if it's not necessary to do this, can you please explain why? >> (I'm assuming the target platform has a separate L1 i-cache). Thanks. > > On x86 in particular, explicitly flushing the instruction cache isn't > necessary; the processor transparently handles modifications to cached > code.It handles modifications properly as long as the execution trace passes through a branch before hitting the modified code. It's still possible to run into problems if you try to modify the currently executing basic block. That said, it's correct that for the purposes of LLVM JIT (and most sane purposes I can imagine), you don't need to worry about flushing the icache on X86. --Owen -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 2620 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100306/d5e5fc1e/attachment.bin>
Thanks, and thanks Jeffrey for your response as well. So I see in Memory.cpp in sys_icache_invalidate() that we only invalidate the cache for powerpc. Can you point me to any literature that describes how for x86 the processor handles these modifications automatically? Does this work, by the way, for both AMD and Intel chips? - on Linux and NT? Thanks. - Shasank> Date: Sat, 6 Mar 2010 23:19:28 -0800 > Subject: Re: [LLVMdev] llvm and flushing instruction cache > From: eli.friedman at gmail.com > To: shanko_chavano at hotmail.com > CC: llvmdev at cs.uiuc.edu > > On Sat, Mar 6, 2010 at 10:34 PM, Shasank Chavan > <shanko_chavano at hotmail.com> wrote: > > Hi. I have a very quick question. Is the instruction cache flushed by the > > llvm jit before code in memory is written to or executed? I'm assuming so, > > but I can't find where in the source code this is happening. In particular > > I searched for clflush, invd, and wbinvd instructions, but couldn't find > > them. And if it's not necessary to do this, can you please explain why? > > (I'm assuming the target platform has a separate L1 i-cache). Thanks. > > On x86 in particular, explicitly flushing the instruction cache isn't > necessary; the processor transparently handles modifications to cached > code. > > -Eli_________________________________________________________________ Your E-mail and More On-the-Go. Get Windows Live Hotmail Free. http://clk.atdmt.com/GBL/go/201469229/direct/01/ -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100307/c83f138c/attachment.html>
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