Chris,
Thanks for the help, this will help me with writing more patterns, but
I am still hitting another roadblock. I attempted what you suggested and
it fixed that issue, but then it started giving a warning that there is
an unknown node in the resulting pattern.
// unsigned int: f64->i32 ==> f64->f32 + f32->i32
def : Pat<(i32 (fp_to_uint (f64 GPR:$src0))),
(i32 (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0)))))>;
1>Building AMDil.td instruction selector implementation with tblgen
1>(fp_to_uint:i32 (dp_to_fp:f32 GPR:f64:$src0))
1>f:\hq\main\sw\appeng\tools\hpc\opencl\llvm\win32\AMDIL\..\bin\Win32\De
bug\TableGen.exe: Unknown node in result pattern!
both fp_to_uint and dp_to_fp are used in other patterns, so I am sure
that the patterns separate from each other work and the above pattern
passes the instruction information stage, so not sure why the
instruction selector cannot parse it. Any help would be useful.
Thanks,
________________________________
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Chris Lattner
Sent: Monday, October 06, 2008 9:15 PM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] Multi instruction pattern help
On Oct 6, 2008, at 5:42 PM, Villmow, Micah wrote:
I am trying to get a multi instruction pattern to work and seem to be
running into trouble.
The problem itself is fairly simple. I need to go from 64bit floats to
32bit integers. As the backend doesn't support this natively but has a
way of converting it, I'd prefer to get this working via tablegen.
What I thought would work from the previous discussion is the following:
def : Pat<(fp_to_uint (f64 GPR:$src0)),
(fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0))))>;
Which when it runs across a 64bit float, it does a double to
single conversion, and then calls the 32bit float to int routine.
However, tablegen fails with the following error:
1>anonymous.2: (fp_to_uint:isInt GPR:f64:$src0)
This is trying to tell you that it inferred that fp_to_uint returns an
integer type, but it doesn't know which one. Try disambiguating either
the input or output with an explicit type, ilke (i32 (fp_to_uint (...
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On Oct 7, 2008, at 9:30 AM, Villmow, Micah wrote:> Chris, > Thanks for the help, this will help me with writing more patterns, > but I am still hitting another roadblock. I attempted what you > suggested and it fixed that issue, but then it started giving a > warning that there is an unknown node in the resulting pattern. > > // unsigned int: f64->i32 ==> f64->f32 + f32->i32 > def : Pat<(i32 (fp_to_uint (f64 GPR:$src0))), > (i32 (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0)))))>; > 1>Building AMDil.td instruction selector implementation with tblgen > 1>(fp_to_uint:i32 (dp_to_fp:f32 GPR:f64:$src0)) > 1>f:\hq\main\sw\appeng\tools\hpc\llvm\win32\AMDIL\..\bin\Win32\Debug > \TableGen.exe: Unknown node in result pattern! > both fp_to_uint and dp_to_fp are used in other patterns, so I am > sure that the patterns separate from each other work and the above > pattern passes the instruction information stage, so not sure why > the instruction selector cannot parse it. Any help would be useful.What are you trying to do here? Your pattern is transforming target independent nodes into other target independent nodes (fp_to_uint, etc)? That's not going to work. Patterns are meant to transform to target instruction nodes. Evan> > Thanks, > > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev- > bounces at cs.uiuc.edu] On Behalf Of Chris Lattner > Sent: Monday, October 06, 2008 9:15 PM > To: LLVM Developers Mailing List > Subject: Re: [LLVMdev] Multi instruction pattern help > > > On Oct 6, 2008, at 5:42 PM, Villmow, Micah wrote: > > > I am trying to get a multi instruction pattern to work and seem to > be running into trouble. > The problem itself is fairly simple. I need to go from 64bit floats > to 32bit integers. As the backend doesn’t support this natively but > has a way of converting it, I’d prefer to get this working via > tablegen. > > What I thought would work from the previous discussion is the > following: > def : Pat<(fp_to_uint (f64 GPR:$src0)), > (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0))))>; >> >> Which when it runs across a 64bit float, it does a double to single >> conversion, and then calls the 32bit float to int routine. > > > > > > However, tablegen fails with the following error: > 1>anonymous.2: (fp_to_uint:isInt GPR:f64:$src0) > > This is trying to tell you that it inferred that fp_to_uint returns > an integer type, but it doesn't know which one. Try disambiguating > either the input or output with an explicit type, ilke (i32 > (fp_to_uint (... > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081007/9a2c4cb9/attachment.html>
On Tuesday 07 October 2008 13:23, Evan Cheng wrote:> What are you trying to do here? Your pattern is transforming target > independent nodes into other target independent nodes (fp_to_uint, > etc)? That's not going to work. Patterns are meant to transform to > target instruction nodes.Yes, I ran into that problem a couple of weeks ago. There are cases where doing this kind of transformation is useful but tblgen doesn't support it yet. Much of instcombine could be expressed with such patterns, for example. -Dave
Evan,
Thanks, I understand better now. This is what I eventually came up
with.
def : Pat<(i32 (fp_to_sint (f64 GPR:$src0))),
(i32 (FTOI (f32 (DTOF (f64 GPR:$src0)))))>;
Micah
________________________________
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Evan Cheng
Sent: Tuesday, October 07, 2008 11:24 AM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] Multi instruction pattern help
On Oct 7, 2008, at 9:30 AM, Villmow, Micah wrote:
Chris,
Thanks for the help, this will help me with writing more patterns, but
I am still hitting another roadblock. I attempted what you suggested and
it fixed that issue, but then it started giving a warning that there is
an unknown node in the resulting pattern.
// unsigned int: f64->i32 ==> f64->f32 + f32->i32
def : Pat<(i32 (fp_to_uint (f64 GPR:$src0))),
(i32 (fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0)))))>;
1>Building AMDil.td instruction selector implementation with tblgen
1>(fp_to_uint:i32 (dp_to_fp:f32 GPR:f64:$src0))
both fp_to_uint and dp_to_fp are used in other patterns, so I am sure
that the patterns separate from each other work and the above pattern
passes the instruction information stage, so not sure why the
instruction selector cannot parse it. Any help would be useful.
What are you trying to do here? Your pattern is transforming target
independent nodes into other target independent nodes (fp_to_uint, etc)?
That's not going to work. Patterns are meant to transform to target
instruction nodes.
Evan
Thanks,
________________________________
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Chris Lattner
Sent: Monday, October 06, 2008 9:15 PM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] Multi instruction pattern help
On Oct 6, 2008, at 5:42 PM, Villmow, Micah wrote:
I am trying to get a multi instruction pattern to work and seem to be
running into trouble.
The problem itself is fairly simple. I need to go from 64bit floats to
32bit integers. As the backend doesn't support this natively but has a
way of converting it, I'd prefer to get this working via tablegen.
What I thought would work from the previous discussion is the following:
def : Pat<(fp_to_uint (f64 GPR:$src0)),
(fp_to_uint (f32 (dp_to_fp (f64 GPR:$src0))))>;
Which when it runs across a 64bit float, it does a double to
single conversion, and then calls the 32bit float to int routine.
However, tablegen fails with the following error:
1>anonymous.2: (fp_to_uint:isInt GPR:f64:$src0)
This is trying to tell you that it inferred that fp_to_uint returns an
integer type, but it doesn't know which one. Try disambiguating either
the input or output with an explicit type, ilke (i32 (fp_to_uint (...
_______________________________________________
LLVM Developers mailing list
LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
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