llvm dev - May 2008 - [LLVMdev] LLVM on small MCUs?

> [llvm-commits] PATCH for PIC16 target.
Do you have a link?  Google isn't turning this up.

I'd be interested in hearing more about this experience...

Thanks,

John

> Do you have a link?  Google isn't turning this up.
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080512/062319.html
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>> Do you have a link?  Google isn't turning this up.
>http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080512/062319.html
Wow, PIC looks like a brutal port.

AVR would be easy in comparison: stack-based architecture with plenty of 
registers.  However, these architectures share:

- 8-bit loads, stores, and arithmetic ops.
- Harvard architecture

What sizes and alignments you choosing for the machine-dependent types? 
avr-gcc for example has:

sizeof(short)=2
sizeof(int)=2
sizeof(long)=4
sizeof(long long)=8
sizeof(int *)=2
sizeof(enum)=2
alignof(anything)=1

For any architecture where sizeof(int) > sizeof(register) it is desirable 
avoid whenever possible being forced to perform int-sized computations, 
which tend to be extremely inefficient, by C's promote to integer 
tendencies.  I think this is what is being discussed in "challenge #1"
in
the mail to llvm-commits above.  This optimization is crucial for MCU 
compilers.

John