llvm dev - Jun 2007 - [LLVMdev] Node definitions, Pseudo ops and lowering SELECT/COND_BRANCH to branch instructions

Howdy,
  <---stuff deleted ----->


Basically the architecture I want to compile to (SABRE) RISC  does 
not support a conditional branch or a select instruction. It supports 
explicit branches of the form.

blt %a, %b, imm // branch on less than iff %a < %b then pc = pc + imm
So there are various branch instructions like .... ble, beq, bne, 
blt, bltu  and bleu (unsigned)

Im just slightly confused as to the distinction between expand and 
custom, and when it becomes appropriate to use custom over expand.

I'd like some definitive advice on whether to go for expansion or 
custom to go further with getting instruction selection working correctly.

Andy


      Dr. Andy Nisbet: URL http://www.docm.mmu.ac.uk/STAFF/A.Nisbet
Department of Computing and Mathematics, John Dalton Building, Manchester
        Metropolitan University, Chester Street, Manchester M1 5GD, UK.
Email: A.Nisbet at mmu.ac.uk, Phone:(+44)-161-247-1556; Fax:(+44)-161-247-1483.

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On Fri, 15 Jun 2007, Andy Nisbet wrote:
> Basically the architecture I want to compile to (SABRE) RISC  does not 
> support a conditional branch or a select instruction. It supports explicit 
> branches of the form.
>
> blt %a, %b, imm // branch on less than iff %a < %b then pc = pc + imm
> So there are various branch instructions like .... ble, beq, bne, blt, bltu
> and bleu (unsigned)
This sounds like no problem.  The BR_CC node does exactly this (it 
contains an LHS, RHS, condition, and destination block.  Just mark BRCOND 
as expand and implement BR_CC and you should be set.

-Chris

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