Florian Brandner
2007-May-21 11:32 UTC
[LLVMdev] instruction writing two successive registers
hi, the architecture that we are compiling for has a special vector shuffle instruction, which writes two successive registers (Rn and Rn+1). i have defined intrinsics to generate the instruction, and a special register class for the register pairs. in addition i have two EXTRACT operations which allow to access either the first or second subregister of a pair (using moves). the pair register class is used only for this purpose and may not occur in other operations. this works fine. except for the extra moves generated by the EXTRACT, which can not be eliminated by coalescing, due to the differing register classes. here is a small example: // Pn is a register pair // 'a' and 'b' are regular registers Pn = shuffle(x, y) a = extract_lo(Pn) // which is a = Rn, b = extract_hi(Pn) // which is b = Rn+1 here it would be nice to assign 'a' to the first subregister of Pn (Rn), and b to the second (Rn+1). instead of using the pair register class, i also thought about adding a register constraint - something like TIED_TO_NEXT. can anyone give me an advise how to handle this special instruction? thank you, florian
On May 21, 2007, at 4:32 AM, Florian Brandner wrote:> hi, > > the architecture that we are compiling for has a special vector > shuffle > instruction, which writes two successive registers (Rn and Rn+1). > > i have defined intrinsics to generate the instruction, and a special > register class for the register pairs. in addition i have two EXTRACT > operations which allow to access either the first or second > subregister > of a pair (using moves). the pair register class is used only for this > purpose and may not occur in other operations. > > this works fine. except for the extra moves generated by the EXTRACT, > which can not be eliminated by coalescing, due to the differing > register > classes. > > here is a small example: > > // Pn is a register pair > // 'a' and 'b' are regular registers > Pn = shuffle(x, y) > a = extract_lo(Pn) // which is a = Rn, > b = extract_hi(Pn) // which is b = Rn+1 > > here it would be nice to assign 'a' to the first subregister of Pn > (Rn), > and b to the second (Rn+1). > > instead of using the pair register class, i also thought about > adding a > register constraint - something like TIED_TO_NEXT. > > can anyone give me an advise how to handle this special instruction?Pair register class is the right way to handle this. Unfortunately, you won't be able to get rid of extra copies until PR1350 has been completed: http://llvm.org/bugs/show_bug.cgi?id=1350 Evan> > thank you, > florian > > > > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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