Lauro Ramos Venancio
2006-Dec-05 14:28 UTC
[LLVMdev] possible bug in X86TargetLowering::getRegClassForInlineAsmConstraint
In file lib/Target/X86/X86ISelLowering.cpp
Function X86TargetLowering::getRegClassForInlineAsmConstraint
I think the second register must be X86::BL.
else if (VT == MVT::i8)
return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL,
0);
Lauro
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Chris Lattner
2006-Dec-05 18:00 UTC
[LLVMdev] possible bug in X86TargetLowering::getRegClassForInlineAsmConstraint
On Tue, 5 Dec 2006, Lauro Ramos Venancio wrote:> In file lib/Target/X86/X86ISelLowering.cpp > Function X86TargetLowering::getRegClassForInlineAsmConstraint > > I think the second register must be X86::BL. > > else if (VT == MVT::i8) > return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL, 0);Nice catch, fixed: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061204/040797.html -Chris -- http://nondot.org/sabre/ http://llvm.org/
Maybe Matching Threads
- [LLVMdev] Suspicious code for X86 target
- [LLVMdev] [patch] getRegClassForInlineAsmConstraint for ARM
- [LLVMdev] [patch] getRegClassForInlineAsmConstraint for ARM
- [LLVMdev] [patch] arm: external weak in constant pool
- [LLVMdev] [patch] arm: external weak in constant pool