I am trying to write a skeleton of an ARM back end. I have declared
the following class
class InstARM<dag ops, string asmstr, list<dag> pattern> :
Instruction {
let Namespace = "ARM";
dag OperandList = ops;
let AsmString = asmstr;
let Pattern = pattern;
}
and defined three instructions (ldr, str, and mov).
The problem is that, in the generated code, the namespace isn't used
everywhere I expected. For example, in
ARMAsmPrinter::printInstruction, the PHI instruction doesn't has an
"ARM::" prepended to it. ldr, str and mov have. An ARM namespace is
also missing in ARMGenInstrNames.inc.
Someone with more experience with tablegen knows why it isn't adding
these namesaces to the generated code?
Thanks,
Rafael
On Mon, 1 May 2006, [UTF-8] Rafael Esp?ndola wrote:> I am trying to write a skeleton of an ARM back end. I have declared > the following class > > class InstARM<dag ops, string asmstr, list<dag> pattern> : Instruction { > let Namespace = "ARM"; > > dag OperandList = ops; > let AsmString = asmstr; > let Pattern = pattern; > } > > and defined three instructions (ldr, str, and mov). > > The problem is that, in the generated code, the namespace isn't used > everywhere I expected. For example, in > ARMAsmPrinter::printInstruction, the PHI instruction doesn't has an > "ARM::" prepended to it. ldr, str and mov have. An ARM namespace is > also missing in ARMGenInstrNames.inc.This looks like a tblgen bug. If you look at utils/TableGen/AsmWriterEmitter.cpp:290, it appears to take the namespace from the first instruction in an equivalence class that it comes across. I will fix this bug this afternoon, but in the meantime, if you define an instruction "AAA" which takes no operands, it will work around this. -Chris -- http://nondot.org/sabre/ http://llvm.org/
> This looks like a tblgen bug. If you look at > utils/TableGen/AsmWriterEmitter.cpp:290, it appears to take the namespace > from the first instruction in an equivalence class that it comes across. > I will fix this bug this afternoon, but in the meantime, if you define an > instruction "AAA" which takes no operands, it will work around this.Thanks. Defining "AAA" did worked around the problem.> -ChrisRafael