Displaying 8 results from an estimated 8 matches for "armgeninstrnames".
2006 May 01
1
[LLVMdev] problems with tablegen and namespaces
> > In ARMGenInstrNames.inc, the TargetInstrInfo namespace is used if the
> > AAA instruction isn't defined and the ARM namespace is used if it is
> > defined.
>
> I don't follow here. XXXGenInstrNames.inc shouldn't have namespaces at
> all. Can you paste a few lines out of the file that...
2006 May 01
2
[LLVMdev] problems with tablegen and namespaces
...e fixed, at least for
> the AsmPrinter. Please try it out (without AAA), and let me know if you
> have problems with any other part of the code generator.
The behaviour now is:
The TargetInstrInfo namespace is used for the PHI instruction
regardless of the presence of the AAA instruction.
In ARMGenInstrNames.inc, the TargetInstrInfo namespace is used if the
AAA instruction isn't defined and the ARM namespace is used if it is
defined.
> Thanks!
>
> -Chris
Best Regards,
Rafael
2006 May 01
0
[LLVMdev] problems with tablegen and namespaces
...me know if you
>> have problems with any other part of the code generator.
> The behaviour now is:
> The TargetInstrInfo namespace is used for the PHI instruction
> regardless of the presence of the AAA instruction.
Good, this is expected. TargetInstrInfo::PHI == ARM::PHI.
> In ARMGenInstrNames.inc, the TargetInstrInfo namespace is used if the
> AAA instruction isn't defined and the ARM namespace is used if it is
> defined.
I don't follow here. XXXGenInstrNames.inc shouldn't have namespaces at
all. Can you paste a few lines out of the file that you are seeing?
Thank...
2008 Sep 09
1
[LLVMdev] ARM Media Instruction
Hi,
I was going through the ARM Codegen support in LLVM and noticed that
Media instructions like UADD16, UADD8 are not listed in ARM Codegen
tables( Specifically, ARMGenInstrNames.inc does not list these
instructions).
So, can ARM codegen produce media instructions or does it lack the
support for them?
Thanks
Kapil
2006 May 01
2
[LLVMdev] problems with tablegen and namespaces
...ldr, str, and mov).
The problem is that, in the generated code, the namespace isn't used
everywhere I expected. For example, in
ARMAsmPrinter::printInstruction, the PHI instruction doesn't has an
"ARM::" prepended to it. ldr, str and mov have. An ARM namespace is
also missing in ARMGenInstrNames.inc.
Someone with more experience with tablegen knows why it isn't adding
these namesaces to the generated code?
Thanks,
Rafael
2006 May 01
0
[LLVMdev] problems with tablegen and namespaces
...The problem is that, in the generated code, the namespace isn't used
> everywhere I expected. For example, in
> ARMAsmPrinter::printInstruction, the PHI instruction doesn't has an
> "ARM::" prepended to it. ldr, str and mov have. An ARM namespace is
> also missing in ARMGenInstrNames.inc.
This looks like a tblgen bug. If you look at
utils/TableGen/AsmWriterEmitter.cpp:290, it appears to take the namespace
from the first instruction in an equivalence class that it comes across.
I will fix this bug this afternoon, but in the meantime, if you define an
instruction "AAA&...
2006 May 01
2
[LLVMdev] problems with tablegen and namespaces
> This looks like a tblgen bug. If you look at
> utils/TableGen/AsmWriterEmitter.cpp:290, it appears to take the namespace
> from the first instruction in an equivalence class that it comes across.
> I will fix this bug this afternoon, but in the meantime, if you define an
> instruction "AAA" which takes no operands, it will work around this.
Thanks. Defining
2006 May 01
0
[LLVMdev] problems with tablegen and namespaces
On Mon, 1 May 2006, [UTF-8] Rafael Esp?ndola wrote:
>> This looks like a tblgen bug. If you look at
>> utils/TableGen/AsmWriterEmitter.cpp:290, it appears to take the namespace
>> from the first instruction in an equivalence class that it comes across.
>> I will fix this bug this afternoon, but in the meantime, if you define an
>> instruction "AAA" which