This part of the code puzzle me a lot:
in arch/x86/traps.c: do_general_protection():
asmlinkage int do_general_protection(struct cpu_user_regs *regs)
{
And reading through the remarks:
/*
* Cunning trick to allow arbitrary "INT n" handling.
*
* We set DPL == 0 on all vectors in the IDT. This prevents any INT
<n>
* instruction from trapping to the appropriate vector, when that might not
* be expected by Xen or the guest OS. For example, that entry might be for
* a fault handler (unlike traps, faults don''t increment EIP), or
might
* expect an error code on the stack (which a software trap never
* provides), or might be a hardware interrupt handler that doesn''t
like
* being called spuriously.
*
* Instead, a GPF occurs with the faulting IDT vector in the error code.
* Bit 1 is set to indicate that an IDT entry caused the fault. Bit 0 is
* clear to indicate that it''s a software fault, not hardware.
*/
Now question is:
The code in Xen hypervisor is running at CPL 0, and so if the DPL of
IDT is set to 0, upon encountering interrupt condition, the
corresponding entries in IDT will still be executed, and not
triggering a GPF (triggered only if DPL of IDT entries is >0, right?).
Where is the code that set the DPL of IDT to zero?
And why do we need to handle this "cunning trick"? Can''t we
just the
normal interrupt table?
Thank you very much for your help.
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