llvm dev - Apr 2016 - phys reg liveness during foldMemoryOperandImpl()

Hi,

I wonder if it would be possible to extend foldMemoryOperandImp() so 
that targets can check for liveness of a particular phys reg?

The case I am thinking of is when the new instruction clobbers the CC 
reg, while the old one did not. In this case the new instruction can 
only become a replacement if the CC reg is known to be dead.

The idea is that liveness of phys regs should be available somehow when 
this functionis called during regalloc. Part of the issue is the fact 
that CC reg is not an allocatable register.

/Jonas Paulsson

ping.

Either this can be implemented easily, or the current SystemZ 
optimization LAY -> AGSI in foldMemoryOperandImpl() should be removed, 
since this is actually illegal.

/Jonas

On 2016-04-15 12:53, Jonas Paulsson wrote:
> Hi,
>
> I wonder if it would be possible to extend foldMemoryOperandImp() so 
> that targets can check for liveness of a particular phys reg?
>
> The case I am thinking of is when the new instruction clobbers the CC 
> reg, while the old one did not. In this case the new instruction can 
> only become a replacement if the CC reg is known to be dead.
>
> The idea is that liveness of phys regs should be available somehow 
> when this functionis called during regalloc. Part of the issue is the 
> fact that CC reg is not an allocatable register.
>
> /Jonas Paulsson
>

I would expect that it shouldn't be too hard to pass around a reference to
LiveIntervalAnalysis*. Patches welcome :)

- Matthias
> On Apr 27, 2016, at 11:38 AM, Jonas Paulsson via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> ping.
> 
> Either this can be implemented easily, or the current SystemZ optimization
LAY -> AGSI in foldMemoryOperandImpl() should be removed, since this is
actually illegal.
> 
> /Jonas
> 
> On 2016-04-15 12:53, Jonas Paulsson wrote:
>> Hi,
>> 
>> I wonder if it would be possible to extend foldMemoryOperandImp() so
that targets can check for liveness of a particular phys reg?
>> 
>> The case I am thinking of is when the new instruction clobbers the CC
reg, while the old one did not. In this case the new instruction can only become
a replacement if the CC reg is known to be dead.
>> 
>> The idea is that liveness of phys regs should be available somehow when
this functionis called during regalloc. Part of the issue is the fact that CC
reg is not an allocatable register.
>> 
>> /Jonas Paulsson
>> 
> 
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