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...thub.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But  Comma  isNot  AsmToken::RParen , for example: 0($3,$4) Then llvm-mc thrown such error: test/MC/Mips/loongson3a/valid.s:32:32: error: ')' expected         gslbx           $2,0($3,$4)                                           ^ test/MC/Mips/loongson3a/val...

I'm running the latest wine version on fedora 13 and when I try to install ACT! on wine I get this window saying that I need to enable file and print sharing before I can install the software. I already installed winetricks and .net framework v 2.0 but I have no idea how to enable file sharing. Can anybody help me?

The various register access wrappers in nouveau_hw.h are so noisy when drm.debug > 0, that some of them can overflow the kernel message buffer. Add nouveau.ko parameter 'reg_debug', a bitmask that enables each of the wrapper debug messages individually. By default, nothing is printed. Signed-off-by: P...

...ve written a function to perform this mapping. However, the function I have written doesn't seem to work with vectors greater than length 1, and as such is useless. Is there any way to ensure the function would work appropriately for each element of the vector input? mapLN <- function(x) { Reg <- levels(df$Var1) if (x==Reg[1] | x==Reg[2] | x==Reg[13] | x==Reg[17] | x==Reg[20] | x==Reg[23] | x==Reg[27]) {"North"} else if (x==Reg[3] | x==Reg[5] | x==Reg[7] | x==Reg[14] | x==Reg[15] | x==Reg[24] | x==Reg[30]) {"East"} else if (x==Reg[4] | x==Reg[6] | x==Reg[8] | x=...

Hi all - This isn't really directly Asterisk related, but has anyone successfully set up a Polycom phone to register two lines on two different Asterisk boxes? I can get the first line to register, but the second one does not. I can still place calls from that second line, which indicates to me the server, user, and secret are correct. I'm running the newest 2.6 series firmware with the newest SIP image....

I'm building this with llvm-c, and accessing these intrinsics via calling the intrinsic as if it were a function. class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : NVPTXInst<(outs regclassOut:$dst), (ins), OpStr, [(set regclassOut:$dst, (IntOp))]>; def INT_PTX_SREG_TID_X : F_SREG<"mov.u32 \t$dst, %tid.x;", Int32Regs, int_nvvm_read_ptx_sreg_tid...

...4:31 ? 00:00:00 /usr/local/sbin/sshd =============== > lsof -p 23936 > COMMAND PID USER FD TYPE DEVICE SIZE NODE NAME > sshd 23936 root cwd DIR 9,1 4096 2 / > sshd 23936 root rtd DIR 9,1 4096 2 / > sshd 23936 root txt REG 253,6 447744 1081352 /usr/local/sbin/sshd (deleted) > sshd 23936 root mem REG 9,1 139416 65572 /lib64/ld-2.5.so > sshd 23936 root mem REG 9,1 1717800 65573 /lib64/libc-2.5.so > sshd 23936 root mem REG 9,1 37368 65723 /lib64/libwrap.so.0.7.6 >...

Do so by simply re-using _show_registers(). Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_64/traps.c +++ b/xen/arch/x86/x86_64/traps.c @@ -225,6 +225,7 @@ void double_fault(void); void do_double_fault(struct cpu_user_regs *regs) { unsigned int cpu; + unsigned long crs[8]; watchdog_dis...

We weren''t taking the guest mode (CPSR) into account and would always access the user version of the registers. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> --- v2: Fix r8 vs r8_fiq thinko. --- xen/arch/arm/traps.c | 62 ++++++++++++++++++++++++++++++++++++++++++- xen/arch/arm/vgic.c | 4 +- xen/arch/arm/vpl011.c | 4 +- xen/arch/arm/vtimer.c | 7 +++-...

I'm evaluating using Polycom phones for our call center and I've set up my first phone (a SoundPoint 560) to give it a try. The phone is working and can successfully place and receive calls. But every minute, there's an error in the log file: chan_sip.c: Registration from '<sip:6193644850 at jtsd05>' failed for '192.168.200.99' - Username/auth name mismatch Turning on SIP debug, it appears it's asterisk trying to register with the phone: Using latest REGISTER request as basis request Sending to 192.168.200.99 : 5060 (non...

...40360000,00000002,00000018): returning 4036009c 0806d080:trace:heap:HeapAlloc (40360000,00000002,00000018): returning 403600c0 0806d080:trace:heap:HeapAlloc (40360000,00000002,00000018): returning 403600e4 0806d080:trace:heap:HeapAlloc (40360000,00000002,00000038): returning 40360108 0806d080:trace:reg:NtCreateKey (0x0,L"Machine\\Software\\Wine\\Wine",<null>,0,f003f,0xbffff274) 0806d080:trace:reg:NtCreateKey <- 0x0010 0806d080:trace:heap:HeapFree (40360000,00000002,40360108): returning TRUE 0806d080:trace:heap:HeapAlloc (40360000,00000002,00000044): returning 40360108 0806d080:...

Hi, this is continuation for the MMIO accessor rewrite and cleanup. I am currently running nv28 with these patches applied, but I cannot test on PPC. Please, review and comment. If the direction is good, I'll do the same to INSTANCE_{RD,WR} as I did for nv_{rd,wr}32, and change PRAMIN from drm_local_map to simple ioremap. Can the same be done for channel specific mappings, that is

...following interesting factors and types: *8 LSR is examining the following fixup sites: UserInst=%cmp11, OperandValToReplace=%i.010 UserInst=%0, OperandValToReplace=%arrayidx LSR found 2 uses: LSR is examining the following uses: LSR Use: Kind=ICmpZero, Offsets={0}, widest fixup type: i32 reg({0,+,-1}<nw><%while.body>) LSR Use: Kind=Address of i32 in addrspace(0), Offsets={0}, widest fixup type: i32* reg({@buffer,+,8}<nsw><%while.body>) After generating reuse formulae: LSR is examining the following uses: LSR Use: Kind=ICmpZero, Offsets={0}, widest fixup...

Ok, as I said, the most precise way to figure out what's wrong is to emit LLVM IR first (use clang -emit-llvm ...) and check out how it differs from working examples, for instance, nvptx regression tests. ----- Original message ----- > I'm building this with llvm-c, and accessing these intrinsics via calling > the intrinsic as if it were a function. > > class F_SREG<string OpStr, NVPTXRegClass regclassOut, Intrinsic IntOp> : >            NVPTXInst<(outs r...

...more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <asm/xen/privop.h> + +#define MOV_FROM_IFA(reg) \ + movl reg = XSI_IFA; \ + ;; \ + ld8 reg = [reg] + +#define MOV_FROM_ITIR(reg) \ + movl reg = XSI_ITIR; \ + ;; \ + ld8 reg = [reg] + +#define MOV_FROM_ISR(reg) \ + movl reg = XSI_ISR; \ + ;; \ + ld8 reg = [reg] + +#define MOV_FROM_IHA(reg) \ + movl reg = XSI_IHA; \ + ;; \ + ld8 reg = [re...

Thank you, Clayton. It works now! Our debugger server responds "name:J28;generic:fp;bitsize:32;encoding:uint;format:hex;gcc:60;dwarf:60". And I also set other "generic" attributes like sp, pc, ra, arg1~arg8 to related registers. I dig a little and find llvm dwarf generator uses TargetRegisterInfo::getFrameRegister() to obtain frame base, and uses TargetFrameLowering::getFrameIndexReference() to obtain frame base as well as frame offset of a variable. lldb is OK to check value of variable including both formal argu...

Hi Timothy, I'm not sure what you mean by this working for other intrinsics, but in this case, I think you want the intrinsic name llvm.nvvm.read.ptx.sreg.tid.x. For me, this looks like: %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() Pete On Fri, Mar 1, 2013 at 11:51 AM, Timothy Baldridge <tbaldridge at gmail.com> wrote: > I'm building this with llvm-c, and accessing these intrinsics via calling > the intrinsic as if it were a fun...

In this patch, we change read_segment_register to take vcpu and regs parameters for PVH (in upcoming patches). No functionality change. also, make emulate_privileged_op() public for later. Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com> diff -r 93d95f6dd693 -r 0339f85f6068 xen/arch/x86/domain.c --- a/xen/arch/x86/domain.c...

...; - uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3; + uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tUnk_3_2; + int tUNK_base; if (bit_table(dev, 'P', &P)) return -EINVAL; @@ -91,6 +92,11 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq, break; } + tUnk_3_2 = (boot->reg[3] & 0x00ff0000) >> 16; + if(tUnk_3_2 == 0) { + tUnk_3_2 = 0x16; + } + t->reg[0] = (e->tRP << 24 | e->tRAS << 16 | e->tRFC << 8 | e->tRC); t->reg[1] = (e->tWR + 2 + (t->tCWL - 1)) << 24 | @@ -102,7 +108,9 @@ nv50_mem_timing_calc(struc...

Hello, For the following test case, reg.c #include <stdio.h> int getinput() { static int u=10; return u++; } int main() { int a,b,c,d,e,f,g; a=getinput(); b=getinput(); c=getinput(); d=getinput(); e=getinput(); f=getinput(); g=getinput(); printf("%d %d %d %d %d %d %...