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...it this week after all. I’ll try to do that next week. If you do not hear back from me by end of next, do not hesitate to ping me! Cheers, -Quentin > On Apr 22, 2015, at 9:32 AM, Quentin Colombet <qcolombet at apple.com> wrote: > >> >> On Apr 21, 2015, at 11:49 PM, Jonas Paulsson <jonas.paulsson at ericsson.com <mailto:jonas.paulsson at ericsson.com>> wrote: >> >> I looked at SplitKit, but I am not sure how to best do it, so it would be great if you could take a look. > > Sure. > I will try to do that by the end of the week. > > Che...

...a certain limit, intelligent alias querying could stop, just as it stops now in iterateChainSucc when *Depth > 200. But it would then at least be done against the right set of SUs, not against "all SUs that sometime did not need an edge". What do you think about this, anyone? / Jonas Paulsson From: Andrew Trick [mailto:atrick at apple.com] Sent: den 10 februari 2015 22:12 To: Jonas Paulsson Cc: Hal Finkel; Mattias Eriksson V; llvmdev at cs.uiuc.edu; Tom Stellard; Sergei Larin; Patrik Hägglund H; Sanjin Sijaric; llvm commits Subject: Re: [PATCH] Bugfix for missed dependency from store...

..., but I am not sure how to best do it, so it would be great if you could take a look. /Jonas On 2015-04-21 19:35, Quentin Colombet wrote: >> On Apr 21, 2015, at 7:40 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: >> >> >>> On Apr 21, 2015, at 05:39, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: >>> >>> Could it then be that the RegisterCoalescer should split live ranges when LIS->shrinkToUses() return true? Why does it not do that, when the verifier demands this? >> I think it should. That's an oversight. &gt...

On Apr 17, 2013, at 2:33 AM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- >> From: "Jonas Paulsson" <jonas.paulsson at ericsson.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >> Cc: llvmdev at cs.uiuc.edu >> Sent: Wednesday, April 17, 2013 12:22:49 AM >> Subject: RE: [LLVMdev] alias analysis in backend >> >> Hi Hal, >> >&gt...

Hi Jonas, > On Apr 20, 2015, at 4:03 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: > > Hi Quentin, > > After Simple Register Coalescing. Is the code you have pasted with the PHIs feed to the register coalescer? I am trying to understand the setting to help debugging the problem. Also, what does -debug-only=regalloc tell...

...like to suggest a refactoring to make RAGreedy::trySplit() and its sub functions callable from any register allocator. Perhaps part of SplitEditor? What do you think about this? /Jonas From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] Sent: den 4 mars 2015 15:43 To: Jonas Paulsson; Lang Hames Cc: llvmdev at cs.uiuc.edu Subject: RE: PBQP spilling Yes, for now the spilling is done in the most basic way, i.e. it's functionally correct --- but not efficient. The focus was on the allocator itself, not on the spilling. As you noticed, the work still to be done in this area is...

...lysis::Location would handle this... And BasicAliasAnalysis does if (V1 == V2) return MustAlias; , so I'm not sure how this would be done .. ? /Jonas > -----Original Message----- > From: Hal Finkel [mailto:hfinkel at anl.gov] > Sent: Tuesday, April 16, 2013 7:35 PM > To: Jonas Paulsson > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] alias analysis in backend > > ----- Original Message ----- > > From: "Jonas Paulsson" <jonas.paulsson at ericsson.com> > > To: llvmdev at cs.uiuc.edu > > Sent: Tuesday, April 16, 2013 11:24:36 AM &g...

----- Original Message ----- > From: "Andrew Trick" <atrick at apple.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "Jonas Paulsson" <jonas.paulsson at ericsson.com>, llvmdev at cs.uiuc.edu > Sent: Thursday, April 18, 2013 2:33:52 AM > Subject: Re: [LLVMdev] alias analysis in backend > > > On Apr 17, 2013, at 2:33 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > > ----- Original Message...

...that's when I mailed you. My question is still whether it is possible to use the scheduler classes at an arbitrary point, and what the pitfalls might be... /Jonas ________________________________ From: Andrew Trick [mailto:atrick at apple.com] Sent: Saturday, March 09, 2013 3:05 AM To: Jonas Paulsson Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] hazard scheduling nodes On Feb 21, 2013, at 9:11 AM, Jonas Paulsson <jonas.paulsson at ericsson.com<mailto:jonas.paulsson at ericsson.com>> wrote: Hi, I am trying to add Hazard scheduling nodes after buildSchedGraph(), with a schedu...

Hi Jonas, When is the MachineVerifier complaining? I mean after which pass? Thanks, -Quentin > On Apr 17, 2015, at 7:17 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: > > Hi, > > thanks for answering, but the COPY is there already from after isel. It is a copy of a subreg, after a a call returning 64 bits. > > call <ga:@safe_div_func_uint64_t_u_u> > %vreg45<def> = C...

...de. We do want to add splitting support to PBQP, so we should be on the lookout for opportunities to share code where it makes sense. Cheers, Lang. On Sat, Mar 7, 2015 at 5:01 AM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Jonas, > > On Mar 6, 2015, at 12:31 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> > wrote: > > Hi, > > I have worked a little on the PBQP register allocator, and it is quite > clear (at least to me) that it is not even a serious alternative to > RegAllocGreedy at the moment, due to the poor handling of spilling. As >...

.... I would even think it makes sense to have a pre-split pass to prepare the graph, with a global view, and later on use use trySplit (or an equivalent) to handle the local coloring issues. From: Quentin Colombet [mailto:qcolombet at apple.com] Sent: 09 March 2015 23:08 To: Lang Hames Cc: Jonas Paulsson; llvmdev at cs.uiuc.edu; Arnaud De Grandmaison Subject: Re: PBQP spilling Hi Lang, Thanks for the clarifications. On Mar 9, 2015, at 2:30 PM, Lang Hames <lhames at gmail.com> wrote: Hi Quentin, Jonas, Splitting fits in with PBQP reasonably well, at least conceptually. The...

I would expect that it shouldn't be too hard to pass around a reference to LiveIntervalAnalysis*. Patches welcome :) - Matthias > On Apr 27, 2016, at 11:38 AM, Jonas Paulsson via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > ping. > > Either this can be implemented easily, or the current SystemZ optimization LAY -> AGSI in foldMemoryOperandImpl() should be removed, since this is actually illegal. > > /Jonas > > On 2016-04-15 12:53...

----- Original Message ----- > From: "Jonas Paulsson" <jonas.paulsson at ericsson.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: llvmdev at cs.uiuc.edu > Sent: Wednesday, April 17, 2013 12:22:49 AM > Subject: RE: [LLVMdev] alias analysis in backend > > Hi Hal, > > Thanks. How about a symbol wit...

...have parent, and I greate a SUnit(HazardMI). I use this one HazardMI for all hazard nodes. I remove all edges using removePred. I insert edges between Node -> hazardNode -> pred. What is there to think about in this approach? I must be missing some detail... Any help is appreciated, Jonas Paulsson -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130221/7c6b544b/attachment.html>

...used by Hexagon. At this point, there is no plan to address thisin the DFA packetizer since none of the supported targets needthe functionality. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation On 2/12/2013 2:37 AM, Jonas Paulsson wrote: > > Hi, > > I looked a bit through the mail archives, and found this question > answered in Oct 2011 (see below). It is interesting to find this in > the ARM backend, considering your answer. Can you give more > information about for example is this a temporary defici...

On Feb 21, 2013, at 9:11 AM, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: > Hi, > > I am trying to add Hazard scheduling nodes after buildSchedGraph(), with a scheduler derived from ScheduleDAGInstrs. I get weird errors, so I wonder what I am doing wrong? > > What I am doing right now is: > > I hav...

...cc(), because there is only interest in memory deps and those edges have been added already going bottom-up. They are absolutely needed, at least because TII->areMemAccessesTriviallyDisjoint() does not guarantee to be consistent, as it was not in the example above. Sergei? Best regards, Jonas Paulsson -----Original Message----- From: Andrew Trick [mailto:atrick at apple.com] Sent: den 16 december 2014 08:15 To: Jonas Paulsson Cc: Hal Finkel; Mattias Eriksson V; llvmdev at cs.uiuc.edu; Sanjin Sijaric; Tom Stellard; Sergei Larin Subject: Re: ScheduleDAGInstrs.cpp > On Dec 14, 2014, at 3:17...

...xitSU, Depth, Visited); ? I thought only chain edges are relevant, and would instead use if (J->getKind() == SDep::Order) I got strange edges, from memory accesses to normal operation instructions that do not touch memory, because also anti and output edges are followed. Best regards, Jonas Paulsson -----Original Message----- From: Jonas Paulsson Sent: den 13 december 2014 14:47 To: 'Hal Finkel' Cc: Mattias Eriksson V; llvmdev at cs.uiuc.edu; Sanjin Sijaric; Tom Stellard; Andrew Trick Subject: RE: ScheduleDAGInstrs.cpp Hi, Thank you for your reply. I have tried Tom Stellards pat...

...12 @2968 sibling COPY 121 to 122 BB12: // joining BB7 and BB9 phi 9 BB13: // Latch block for outer loop, has edge from BB#4 phi 10 } Is there anything else I can provide that might you? /Jonas From: Quentin Colombet [mailto:qcolombet at apple.com] Sent: den 2 december 2014 01:15 To: Jonas Paulsson Cc: llvmdev at cs.uiuc.edu; stoklund at 2pi.dk; Patrik Hägglund H Subject: Re: [LLVMdev] InlineSpiller.cpp bug? Hi Jonas, Thanks for your patience. I have looked into the problem you reported and although the fix you proposed seem correct, I am not sure yet this is the way to go. I would need th...