fateme Hoseini via llvm-dev
2015-Nov-17 05:16 UTC
[llvm-dev] Confused on how to do a machinefunction pass
Hi, So, I run my pass in X86 target with llc command and it printed out "hello****". Now I am trying to do the same pass for ARM target. So I did exactly what I did for X86 as mentioned in my previous posts. When I run the following command: llc -march=arm test.ll -o test nothing prints out. I did the same for MIPS target too and I got no result. Can anyone tell me what I'm doing wrong. Is there any difference between writing machinefunction passes in x86 and other targets? Thank you, Fami On Fri, Nov 6, 2015 at 10:56 AM, fateme Hoseini <hoseini.f at gmail.com> wrote:> Hi > So I m trying to write my first backend pass. I created a file in > target\x86\wawanalyzer.cpp based on hexagonHardwareLoops.cpp file. Now it's > just a simple file that prints hello to the output. I have attached the > file to this post. > > Then I did the following: > > 1. add "FunctionPass *createwawAnalyzer();" line to x86.h > 2. add file name to CMakelist.txt. > 3. This is going to run after postRAscheduler and before code emission so > I changed the x86TrgetMachine.cpp as follow: > void X86PassConfig::addPreEmitPass() { > /////////////add mypass here/////// > addPass(createwawAnalyzer()); > ////////////////////////////////// > if (getOptLevel() != CodeGenOpt::None) > addPass(createExecutionDependencyFixPass(&X86::VR128RegClass)); > > if (UseVZeroUpper) > addPass(createX86IssueVZeroUpperPass()); > > if (getOptLevel() != CodeGenOpt::None) { > addPass(createX86PadShortFunctions()); > addPass(createX86FixupLEAs()); > } > then I run make on mypass and remake llvm3.7\lib and llvm3.7\tool\llc. > but when I run llc -help it doesn't show my pass. Did I miss some steps or > did something wrong? What's the correct way to run the pass with llc > command? > > I appreciate any help, > Regards > Fami > > On Wed, Nov 4, 2015 at 1:02 PM, fateme Hoseini <hoseini.f at gmail.com> > wrote: > >> Thank you so much. >> That helped alot. >> >> Fami >> >> On Wed, Nov 4, 2015 at 9:40 AM, John Criswell <jtcriswel at gmail.com> >> wrote: >> >>> On 11/3/15 7:54 PM, fateme Hoseini wrote: >>> >>> Dear John, >>> Thank you so much for your help. I looked at those documents. Could you >>> kindly answer the following questions: >>> >>> Does it mean that I have to make my own backend target in order to write >>> a machine pass even if I want to run a simple machinefunction pass? for >>> example,if I want my pass to get MIPS instructions as an input, I have to >>> copy all the files from mips target and add a file to it which implements >>> my pass. and there should be a way to connect the pass to other MIPS >>> backend files? >>> >>> >>> No, you do not need to create a new backend. All you need to do is to >>> add your pass to the list of passes that are run when the MIPS code >>> generator is used. >>> >>> In LLVM 3.3, there was a file in the X86 backend that had code to >>> schedule all the MachineFunctionPass'es when the X86 code generator was >>> used. That was in lib/Target/X86/X86TargetMachine.cpp. You can probably >>> find a similar file for LLVM 3.7 for the MIPS backend. >>> >>> So, to summarize, you'll add your source file to the MIPS backend, add a >>> line somewhere to run your pass when the MIPS code generator is used, and >>> then recompile llvm/lib and llvm/tools/llc. >>> >>> >>> >>> As a result, is the way that I described in my first post completely >>> wrong because I cannot run a stand alone machine function pass like a >>> frontend function pass? >>> >>> >>> As far as I know, there is no way to load a MachineFunctionPass and run >>> it using llc, opt, or clang. I believe you need to compile it into the >>> MIPS backend code. >>> >>> >>> Also another question, I'm a PhD student and I'm completely new to the >>> llvm backend process. I want to estimate my project time. How long >>> approximately do you think it will take to be get familiar with backend and >>> be able to write machinefunction pass? for further steps I have to >>> implement a register allocation algorithm. >>> >>> >>> It's difficult to estimate (especially since I haven't implemented >>> anything as complicated as a register allocator). Your profiling pass may >>> take anywhere from 1 week to 1 month depending on how complicated it is. I >>> think a register allocator would take anywhere from 1 month up to 6 months >>> depending on how robust you need it to be, but since I've never built one, >>> I can't say for certain. >>> >>> Regards, >>> >>> John Criswell >>> >>> >>> >>> Regards, >>> Fami >>> >>> >>> On Tue, Nov 3, 2015 at 3:52 PM, John Criswell <jtcriswel at gmail.com> >>> wrote: >>> >>>> Dear Fami, >>>> >>>> A MachineFunctionPass is run by the code generator, so you can only use >>>> it in tools like llc, clang, and libLTO. The opt program only manipulates >>>> LLVM IR and therefore does not run MachineFunctionPass'es. >>>> >>>> Regarding documentation, have you looked at the following? >>>> >>>> http://llvm.org/docs/WritingAnLLVMBackend.html >>>> http://llvm.org/docs/CodeGenerator.html >>>> http://llvm.org/docs/MIRLangRef.html >>>> >>>> Regards, >>>> >>>> John Criswell >>>> >>>> >>>> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >>>> >>>> Hi everyone, >>>> I am a LLVM newbie. I need to write a machinefunction pass for my >>>> project. This should be an analyzer of the machine code to do some >>>> profiling. I have written a couple of function passes for front end, but it >>>> seems they are completely different. I searched through forum and llvm >>>> documents, but couldn't find anything useful or questions were unanswered. >>>> Can anyone reference me to any material on how to do that or help me with >>>> my roblem. >>>> >>>> I have created a folder in: lib/Transform and put my pass in it. >>>> I am writing a simple pass like this: >>>> >>>> using namespace llvm; >>>> >>>> namespace { >>>> struct analyzer : public MachineFunctionPass { >>>> static char ID; >>>> analyzer() : MachineFunctionPass(ID) {} >>>> virtual bool runOnMachineFunction(MachineFunction &MF) { >>>> errs() << "hello " ; >>>> return false; >>>> } >>>> }; >>>> } >>>> char analyzer::ID = 0; >>>> static RegisterPass<analyzer> X("analyzer", "WAW analyzer"); >>>> >>>> I make it successfully. But when I load it for my test code I get this >>>> error: >>>> >>>> Pass 'WAW analyzer' is not initialized. >>>> Verify if there is a pass dependency cycle. >>>> Required Passes: >>>> opt: /llvm/llvm-3.7/lib/IR/LegacyPassManager.cpp:635: void >>>> llvm::PMTopLevelManager::schedulePass(llvm::Pass*): Assertion `PI && >>>> "Expected required passes to be initialized"' failed. >>>> ..... >>>> >>>> I don't know how to solve it? Do we have to run machinefunction passes >>>> with OPT command? Is this correct to put machinefunction pass in an >>>> external folder or do we have to change some llvm built-in files? >>>> >>>> Regards, >>>> Fami >>>> >>>> >>>> >>>> _______________________________________________ >>>> LLVM Developers mailing listllvm-dev at lists.llvm.orghttp://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >>>> >>>> >>>> >>>> -- >>>> John Criswell >>>> Assistant Professor >>>> Department of Computer Science, University of Rochesterhttp://www.cs.rochester.edu/u/criswell >>>> >>>> >>> >>> >>> -- >>> John Criswell >>> Assistant Professor >>> Department of Computer Science, University of Rochesterhttp://www.cs.rochester.edu/u/criswell >>> >>> >> >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151117/ff2dd5a8/attachment.html>
John Criswell via llvm-dev
2015-Nov-17 15:55 UTC
[llvm-dev] Confused on how to do a machinefunction pass
On 11/17/15 12:16 AM, fateme Hoseini via llvm-dev wrote:> Hi, > So, I run my pass in X86 target with llc command and it printed out > "hello****". Now I am trying to do the same pass for ARM target. So I > did exactly what I did for X86 as mentioned in my previous posts. When > I run the following command:Have you modified the ARM code generator to run your pass (the same way that you modified the X86 code generator to run your pass)? Each backend has code that configures the set of MachineFunctionPass'es to run when that code generator is used. For each backend, you must modify that code to run your MachineFunctionPass. Regards, John Criswell> llc -march=arm test.ll -o test > nothing prints out. I did the same for MIPS target too and I got no > result. Can anyone tell me what I'm doing wrong. Is there any > difference between writing machinefunction passes in x86 and other > targets? > Thank you, > Fami > > On Fri, Nov 6, 2015 at 10:56 AM, fateme Hoseini <hoseini.f at gmail.com > <mailto:hoseini.f at gmail.com>> wrote: > > Hi > So I m trying to write my first backend pass. I created a file in > target\x86\wawanalyzer.cpp based on hexagonHardwareLoops.cpp file. > Now it's just a simple file that prints hello to the output. I > have attached the file to this post. > > Then I did the following: > > 1. add "FunctionPass *createwawAnalyzer();" line to x86.h > 2. add file name to CMakelist.txt. > 3. This is going to run after postRAscheduler and before code > emission so I changed the x86TrgetMachine.cpp as follow: > void X86PassConfig::addPreEmitPass() { > /////////////add mypass here/////// > addPass(createwawAnalyzer()); > ////////////////////////////////// > if (getOptLevel() != CodeGenOpt::None) > addPass(createExecutionDependencyFixPass(&X86::VR128RegClass)); > > if (UseVZeroUpper) > addPass(createX86IssueVZeroUpperPass()); > > if (getOptLevel() != CodeGenOpt::None) { > addPass(createX86PadShortFunctions()); > addPass(createX86FixupLEAs()); > } > then I run make on mypass and remake llvm3.7\lib and > llvm3.7\tool\llc. > but when I run llc -help it doesn't show my pass. Did I miss some > steps or did something wrong? What's the correct way to run the > pass with llc command? > > I appreciate any help, > Regards > Fami > > On Wed, Nov 4, 2015 at 1:02 PM, fateme Hoseini > <hoseini.f at gmail.com <mailto:hoseini.f at gmail.com>> wrote: > > Thank you so much. > That helped alot. > > Fami > > On Wed, Nov 4, 2015 at 9:40 AM, John Criswell > <jtcriswel at gmail.com <mailto:jtcriswel at gmail.com>> wrote: > > On 11/3/15 7:54 PM, fateme Hoseini wrote: >> Dear John, >> Thank you so much for your help. I looked at those >> documents. Could you kindly answer the following questions: >> >> Does it mean that I have to make my own backend target in >> order to write a machine pass even if I want to run a >> simple machinefunction pass? for example,if I want my >> pass to get MIPS instructions as an input, I have to copy >> all the files from mips target and add a file to it which >> implements my pass. and there should be a way to connect >> the pass to other MIPS backend files? > > No, you do not need to create a new backend. All you need > to do is to add your pass to the list of passes that are > run when the MIPS code generator is used. > > In LLVM 3.3, there was a file in the X86 backend that had > code to schedule all the MachineFunctionPass'es when the > X86 code generator was used. That was in > lib/Target/X86/X86TargetMachine.cpp. You can probably find > a similar file for LLVM 3.7 for the MIPS backend. > > So, to summarize, you'll add your source file to the MIPS > backend, add a line somewhere to run your pass when the > MIPS code generator is used, and then recompile llvm/lib > and llvm/tools/llc. > > >> >> As a result, is the way that I described in my first post >> completely wrong because I cannot run a stand alone >> machine function pass like a frontend function pass? > > As far as I know, there is no way to load a > MachineFunctionPass and run it using llc, opt, or clang. > I believe you need to compile it into the MIPS backend code. > >> >> Also another question, I'm a PhD student and I'm >> completely new to the llvm backend process. I want to >> estimate my project time. How long approximately do you >> think it will take to be get familiar with backend and be >> able to write machinefunction pass? for further steps I >> have to implement a register allocation algorithm. > > It's difficult to estimate (especially since I haven't > implemented anything as complicated as a register > allocator). Your profiling pass may take anywhere from 1 > week to 1 month depending on how complicated it is. I > think a register allocator would take anywhere from 1 > month up to 6 months depending on how robust you need it > to be, but since I've never built one, I can't say for > certain. > > Regards, > > John Criswell > > >> >> Regards, >> Fami >> >> >> On Tue, Nov 3, 2015 at 3:52 PM, John Criswell >> <jtcriswel at gmail.com <mailto:jtcriswel at gmail.com>> wrote: >> >> Dear Fami, >> >> A MachineFunctionPass is run by the code generator, >> so you can only use it in tools like llc, clang, and >> libLTO. The opt program only manipulates LLVM IR and >> therefore does not run MachineFunctionPass'es. >> >> Regarding documentation, have you looked at the >> following? >> >> http://llvm.org/docs/WritingAnLLVMBackend.html >> http://llvm.org/docs/CodeGenerator.html >> http://llvm.org/docs/MIRLangRef.html >> >> Regards, >> >> John Criswell >> >> >> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >>> Hi everyone, >>> I am a LLVM newbie. I need to write a >>> machinefunction pass for my project. This should be >>> an analyzer of the machine code to do some >>> profiling. I have written a couple of function >>> passes for front end, but it seems they are >>> completely different. I searched through forum and >>> llvm documents, but couldn't find anything useful or >>> questions were unanswered. Can anyone reference me >>> to any material on how to do that or help me with my >>> roblem. >>> >>> I have created a folder in: lib/Transform and put my >>> pass in it. >>> I am writing a simple pass like this: >>> >>> using namespace llvm; >>> >>> namespace { >>> struct analyzer : public MachineFunctionPass { >>> static char ID; >>> analyzer() : MachineFunctionPass(ID) {} >>> virtual bool runOnMachineFunction(MachineFunction &MF) { >>> errs() << "hello " ; >>> return false; >>> } >>> }; >>> } >>> char analyzer::ID = 0; >>> static RegisterPass<analyzer> X("analyzer", "WAW >>> analyzer"); >>> >>> I make it successfully. But when I load it for my >>> test code I get this error: >>> >>> Pass 'WAW analyzer' is not initialized. >>> Verify if there is a pass dependency cycle. >>> Required Passes: >>> opt: >>> /llvm/llvm-3.7/lib/IR/LegacyPassManager.cpp:635: >>> void >>> llvm::PMTopLevelManager::schedulePass(llvm::Pass*): >>> Assertion `PI && "Expected required passes to be >>> initialized"' failed. >>> ..... >>> >>> I don't know how to solve it? Do we have to run >>> machinefunction passes with OPT command? Is this >>> correct to put machinefunction pass in an external >>> folder or do we have to change some llvm built-in >>> files? >>> >>> Regards, >>> Fami >>> >>> >>> >>> _______________________________________________ >>> LLVM Developers mailing list >>> llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> >>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> >> >> -- >> John Criswell >> Assistant Professor >> Department of Computer Science, University of Rochester >> http://www.cs.rochester.edu/u/criswell >> >> > > > -- > John Criswell > Assistant Professor > Department of Computer Science, University of Rochester > http://www.cs.rochester.edu/u/criswell > > > > > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-- John Criswell Assistant Professor Department of Computer Science, University of Rochester http://www.cs.rochester.edu/u/criswell -------------- next part -------------- An HTML attachment was scrubbed... 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fateme Hoseini via llvm-dev
2015-Nov-17 16:29 UTC
[llvm-dev] Confused on how to do a machinefunction pass
Yes, I have done exactly the same. The wawanalyzer is the same. I changed ARM.h and ARMTargetMachine.cpp in the tager/arm folder. then I make tool/llc and lib folder. On Tue, Nov 17, 2015 at 10:55 AM, John Criswell <jtcriswel at gmail.com> wrote:> On 11/17/15 12:16 AM, fateme Hoseini via llvm-dev wrote: > > Hi, > So, I run my pass in X86 target with llc command and it printed out > "hello****". Now I am trying to do the same pass for ARM target. So I did > exactly what I did for X86 as mentioned in my previous posts. When I run > the following command: > > > Have you modified the ARM code generator to run your pass (the same way > that you modified the X86 code generator to run your pass)? > > Each backend has code that configures the set of MachineFunctionPass'es to > run when that code generator is used. For each backend, you must modify > that code to run your MachineFunctionPass. > > Regards, > > John Criswell > > > llc -march=arm test.ll -o test > nothing prints out. I did the same for MIPS target too and I got no > result. Can anyone tell me what I'm doing wrong. Is there any difference > between writing machinefunction passes in x86 and other targets? > Thank you, > Fami > > On Fri, Nov 6, 2015 at 10:56 AM, fateme Hoseini <hoseini.f at gmail.com> > wrote: > >> Hi >> So I m trying to write my first backend pass. I created a file in >> target\x86\wawanalyzer.cpp based on hexagonHardwareLoops.cpp file. Now it's >> just a simple file that prints hello to the output. I have attached the >> file to this post. >> >> Then I did the following: >> >> 1. add "FunctionPass *createwawAnalyzer();" line to x86.h >> 2. add file name to CMakelist.txt. >> 3. This is going to run after postRAscheduler and before code emission so >> I changed the x86TrgetMachine.cpp as follow: >> void X86PassConfig::addPreEmitPass() { >> /////////////add mypass here/////// >> addPass(createwawAnalyzer()); >> ////////////////////////////////// >> if (getOptLevel() != CodeGenOpt::None) >> addPass(createExecutionDependencyFixPass(&X86::VR128RegClass)); >> >> if (UseVZeroUpper) >> addPass(createX86IssueVZeroUpperPass()); >> >> if (getOptLevel() != CodeGenOpt::None) { >> addPass(createX86PadShortFunctions()); >> addPass(createX86FixupLEAs()); >> } >> then I run make on mypass and remake llvm3.7\lib and llvm3.7\tool\llc. >> but when I run llc -help it doesn't show my pass. Did I miss some steps >> or did something wrong? What's the correct way to run the pass with llc >> command? >> >> I appreciate any help, >> Regards >> Fami >> >> On Wed, Nov 4, 2015 at 1:02 PM, fateme Hoseini < <hoseini.f at gmail.com> >> hoseini.f at gmail.com> wrote: >> >>> Thank you so much. >>> That helped alot. >>> >>> Fami >>> >>> On Wed, Nov 4, 2015 at 9:40 AM, John Criswell < <jtcriswel at gmail.com> >>> jtcriswel at gmail.com> wrote: >>> >>>> On 11/3/15 7:54 PM, fateme Hoseini wrote: >>>> >>>> Dear John, >>>> Thank you so much for your help. I looked at those documents. Could you >>>> kindly answer the following questions: >>>> >>>> Does it mean that I have to make my own backend target in order to >>>> write a machine pass even if I want to run a simple machinefunction pass? >>>> for example,if I want my pass to get MIPS instructions as an input, I have >>>> to copy all the files from mips target and add a file to it which >>>> implements my pass. and there should be a way to connect the pass to other >>>> MIPS backend files? >>>> >>>> >>>> No, you do not need to create a new backend. All you need to do is to >>>> add your pass to the list of passes that are run when the MIPS code >>>> generator is used. >>>> >>>> In LLVM 3.3, there was a file in the X86 backend that had code to >>>> schedule all the MachineFunctionPass'es when the X86 code generator was >>>> used. That was in lib/Target/X86/X86TargetMachine.cpp. You can probably >>>> find a similar file for LLVM 3.7 for the MIPS backend. >>>> >>>> So, to summarize, you'll add your source file to the MIPS backend, add >>>> a line somewhere to run your pass when the MIPS code generator is used, and >>>> then recompile llvm/lib and llvm/tools/llc. >>>> >>>> >>>> >>>> As a result, is the way that I described in my first post completely >>>> wrong because I cannot run a stand alone machine function pass like a >>>> frontend function pass? >>>> >>>> >>>> As far as I know, there is no way to load a MachineFunctionPass and run >>>> it using llc, opt, or clang. I believe you need to compile it into the >>>> MIPS backend code. >>>> >>>> >>>> Also another question, I'm a PhD student and I'm completely new to the >>>> llvm backend process. I want to estimate my project time. How long >>>> approximately do you think it will take to be get familiar with backend and >>>> be able to write machinefunction pass? for further steps I have to >>>> implement a register allocation algorithm. >>>> >>>> >>>> It's difficult to estimate (especially since I haven't implemented >>>> anything as complicated as a register allocator). Your profiling pass may >>>> take anywhere from 1 week to 1 month depending on how complicated it is. I >>>> think a register allocator would take anywhere from 1 month up to 6 months >>>> depending on how robust you need it to be, but since I've never built one, >>>> I can't say for certain. >>>> >>>> Regards, >>>> >>>> John Criswell >>>> >>>> >>>> >>>> Regards, >>>> Fami >>>> >>>> >>>> On Tue, Nov 3, 2015 at 3:52 PM, John Criswell < <jtcriswel at gmail.com> >>>> jtcriswel at gmail.com> wrote: >>>> >>>>> Dear Fami, >>>>> >>>>> A MachineFunctionPass is run by the code generator, so you can only >>>>> use it in tools like llc, clang, and libLTO. The opt program only >>>>> manipulates LLVM IR and therefore does not run MachineFunctionPass'es. >>>>> >>>>> Regarding documentation, have you looked at the following? >>>>> >>>>> <http://llvm.org/docs/WritingAnLLVMBackend.html> >>>>> http://llvm.org/docs/WritingAnLLVMBackend.html >>>>> <http://llvm.org/docs/CodeGenerator.html> >>>>> http://llvm.org/docs/CodeGenerator.html >>>>> <http://llvm.org/docs/MIRLangRef.html> >>>>> http://llvm.org/docs/MIRLangRef.html >>>>> >>>>> Regards, >>>>> >>>>> John Criswell >>>>> >>>>> >>>>> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >>>>> >>>>> Hi everyone, >>>>> I am a LLVM newbie. I need to write a machinefunction pass for my >>>>> project. This should be an analyzer of the machine code to do some >>>>> profiling. I have written a couple of function passes for front end, but it >>>>> seems they are completely different. I searched through forum and llvm >>>>> documents, but couldn't find anything useful or questions were unanswered. >>>>> Can anyone reference me to any material on how to do that or help me with >>>>> my roblem. >>>>> >>>>> I have created a folder in: lib/Transform and put my pass in it. >>>>> I am writing a simple pass like this: >>>>> >>>>> using namespace llvm; >>>>> >>>>> namespace { >>>>> struct analyzer : public MachineFunctionPass { >>>>> static char ID; >>>>> analyzer() : MachineFunctionPass(ID) {} >>>>> virtual bool runOnMachineFunction(MachineFunction &MF) { >>>>> errs() << "hello " ; >>>>> return false; >>>>> } >>>>> }; >>>>> } >>>>> char analyzer::ID = 0; >>>>> static RegisterPass<analyzer> X("analyzer", "WAW analyzer"); >>>>> >>>>> I make it successfully. But when I load it for my test code I get this >>>>> error: >>>>> >>>>> Pass 'WAW analyzer' is not initialized. >>>>> Verify if there is a pass dependency cycle. >>>>> Required Passes: >>>>> opt: /llvm/llvm-3.7/lib/IR/LegacyPassManager.cpp:635: void >>>>> llvm::PMTopLevelManager::schedulePass(llvm::Pass*): Assertion `PI && >>>>> "Expected required passes to be initialized"' failed. >>>>> ..... >>>>> >>>>> I don't know how to solve it? Do we have to run machinefunction passes >>>>> with OPT command? Is this correct to put machinefunction pass in an >>>>> external folder or do we have to change some llvm built-in files? >>>>> >>>>> Regards, >>>>> Fami >>>>> >>>>> >>>>> >>>>> _______________________________________________ >>>>> LLVM Developers mailing listllvm-dev at lists.llvm.orghttp://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >>>>> >>>>> >>>>> >>>>> -- >>>>> John Criswell >>>>> Assistant Professor >>>>> Department of Computer Science, University of Rochesterhttp://www.cs.rochester.edu/u/criswell >>>>> >>>>> >>>> >>>> >>>> -- >>>> John Criswell >>>> Assistant Professor >>>> Department of Computer Science, University of Rochesterhttp://www.cs.rochester.edu/u/criswell >>>> >>>> >>> >> > > > _______________________________________________ > LLVM Developers mailing listllvm-dev at lists.llvm.orghttp://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > > > -- > John Criswell > Assistant Professor > Department of Computer Science, University of Rochesterhttp://www.cs.rochester.edu/u/criswell > >-------------- next part -------------- An HTML attachment was scrubbed... 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