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Hi everyone, I'm quite new to LLVM *and doing a Q-learning *(*just a hobby*)* on register allocation for LLVM. RegAllocRL is based on* *RegAllocBase*,* RegAllocBasic and add some feature to implement Q-learning algorithm. * *I*’*ve currently run as MachineFunctionPass and things seem to work in simple case. In order to make progress on training*, *I have questions and want to get some

Dear LLVM developers, Just as LLVM IR can be read/write via persistent bitcode (*.bc *.ll) files, is there any similar implementation in LLVM to read/write Machine IR (MIR) via a persistent file? If not and I would like to add it (e.g. for ARM or RISC-V), could you direct me materials and/or LLVM source code modules where I should start with? Best Regards, Lele Ma -------------- next part

...and lower case letters should be used in MIR. As an example our downstream target has upper case letters in its sub-register indices and as a result we cannot import exported MIR without manually 'lower casing' it first which is obviously rather annoying. Looking in https://llvm.org/docs/MIRLangRef.html it is stated that instruction names are case sensitive. For register names it appear that they are lower cased before printing (see printReg in TargetRegisterInfo.cpp) and to match the definitions are also lower cased before loaded into the parser (see PerTargetMIParsingState::initNames2Regs...

...sed YAML hybrid format for now and will begin sending out the patches soon. Once it's working, people can evaluate it for themselves and see if it suits them or if we need to change it to a custom format. > > BTW, we probably need some sort of LangRef document for this. Maybe > docs/MIRLangRef.rst? That's fine with me. Alex -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150429/1f00799f/attachment.html>

...e an IR file by passing '-S -emit-llvm' to clang, then you can feed that file into llc and use stop-before to get the mir just before the if-converter pass, eg: `llc -stop-before=if-converter -simplify-mir -o test.mir test.ll`. Also there is a MIR language reference: https://llvm.org/docs/MIRLangRef.html which has some of the limitations documented, as well as tips for further simplifying the generated mir if need be. Regards, Sean On Mon, Mar 19, 2018 at 7:53 PM, Valentin Churavy via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hello, > > I am trying to isolate an asserti...

...<http://llvm.org/docs/WritingAnLLVMBackend.html> >>>>> http://llvm.org/docs/WritingAnLLVMBackend.html >>>>> <http://llvm.org/docs/CodeGenerator.html> >>>>> http://llvm.org/docs/CodeGenerator.html >>>>> <http://llvm.org/docs/MIRLangRef.html> >>>>> http://llvm.org/docs/MIRLangRef.html >>>>> >>>>> Regards, >>>>> >>>>> John Criswell >>>>> >>>>> >>>>> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >&gt...

...#39;-S -emit-llvm' to clang, then you can feed that file into > llc and use stop-before to get the mir just before the if-converter pass, > eg: `llc -stop-before=if-converter -simplify-mir -o test.mir test.ll`. > > Also there is a MIR language reference: https://llvm.org/docs/ > MIRLangRef.html which has some of the limitations documented, as well as > tips for further simplifying the generated mir if need be. > > Regards, > Sean > > On Mon, Mar 19, 2018 at 7:53 PM, Valentin Churavy via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hello, &g...

Hello, I am trying to isolate an assertion failure in if-converter (on PPC) and I generated a textual debuglog with: ``` LLVM_ARGS=-print-before-all -print-module-scope -filter-print-funcs=japi1__require_7687 ``` and after splicing out the the MIR before the if-converter pass I would like to run `llc -march=ppc64le -run-pass=if-converter input.mir` so that I can start minimising the MIR. This

...ches soon. Once it's working, people can evaluate it >> for themselves and see if it suits them or if we need to change it to a >> custom format. >> >>> >>> >>> BTW, we probably need some sort of LangRef document for this. Maybe >>> docs/MIRLangRef.rst? >> >> >> That's fine with me. >> >> Alex >> >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listi...

...> Here's another one: > > = Improve code generation testing = > > After instruction selection LLVM uses the MI (Machine Instruction) > representation for programs. We recently added support for reading and > writing this representation to disk > (http://llvm.org/docs/MIRLangRef.html). Usage of this format for > writing tests is growing and so is the desire to improve the format, > tools and workflow. Improvements would be welcome: > > - Create a single consistent format instead of the current mix of yaml > + IR + MIR > - Do not print unnecessary infor...

Hi llvm developers, I might be overlooking something, but I think the ARMConstantIsland pass uses the wrong size for the MachineInstrs representing jump tables: Currently, there is the following calculation in doInitialJumpTablePlacement (lib/Target/ARM/ARMConstantIslandPass.cpp:588): ---------------------------------------------------------------------- unsigned Size = JT[JTI].MBBs.size() *

On 4/28/2015 7:13 PM, Alex L wrote: > > > 2015-04-28 16:26 GMT-07:00 Matthias Braun <matze at braunis.de > <mailto:matze at braunis.de>>: > > For that use case it is worth keeping the following things in mind: > - Please try to keep the output of the various dump functions, esp. > MachineInstr::dump(), MachineOperand::dump(), >

...The opt program only manipulates > LLVM IR and therefore does not run MachineFunctionPass'es. > > Regarding documentation, have you looked at the following? > > http://llvm.org/docs/WritingAnLLVMBackend.html > http://llvm.org/docs/CodeGenerator.html > http://llvm.org/docs/MIRLangRef.html > > Regards, > > John Criswell > > > On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: > > Hi everyone, > I am a LLVM newbie. I need to write a machinefunction pass for my project. > This should be an analyzer of the machine code to do some profiling. I ha...

Hi everyone, I am a LLVM newbie. I need to write a machinefunction pass for my project. This should be an analyzer of the machine code to do some profiling. I have written a couple of function passes for front end, but it seems they are completely different. I searched through forum and llvm documents, but couldn't find anything useful or questions were unanswered. Can anyone reference me to

...39; to clang, then you can feed that file into >> llc and use stop-before to get the mir just before the if-converter pass, >> eg: `llc -stop-before=if-converter -simplify-mir -o test.mir test.ll`. >> >> Also there is a MIR language reference: >> https://llvm.org/docs/MIRLangRef.html which has some of the limitations >> documented, as well as tips for further simplifying the generated mir if >> need be. >> >> Regards, >> Sean >> >> On Mon, Mar 19, 2018 at 7:53 PM, Valentin Churavy via llvm-dev < >> llvm-dev at lists.llvm.o...

...un MachineFunctionPass'es. >>>> >>>> Regarding documentation, have you looked at the following? >>>> >>>> http://llvm.org/docs/WritingAnLLVMBackend.html >>>> http://llvm.org/docs/CodeGenerator.html >>>> http://llvm.org/docs/MIRLangRef.html >>>> >>>> Regards, >>>> >>>> John Criswell >>>> >>>> >>>> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >>>> >>>> Hi everyone, >>>> I am a LLVM newbie. I need to wri...

...u can feed that file into >>> llc and use stop-before to get the mir just before the if-converter pass, >>> eg: `llc -stop-before=if-converter -simplify-mir -o test.mir test.ll`. >>> >>> Also there is a MIR language reference: https://llvm.org/docs/ >>> MIRLangRef.html which has some of the limitations documented, as well >>> as tips for further simplifying the generated mir if need be. >>> >>> Regards, >>> Sean >>> >>> On Mon, Mar 19, 2018 at 7:53 PM, Valentin Churavy via llvm-dev < >>> llvm-...

...ulates >> LLVM IR and therefore does not run MachineFunctionPass'es. >> >> Regarding documentation, have you looked at the following? >> >> http://llvm.org/docs/WritingAnLLVMBackend.html >> http://llvm.org/docs/CodeGenerator.html >> http://llvm.org/docs/MIRLangRef.html >> >> Regards, >> >> John Criswell >> >> >> On 11/3/15 3:47 PM, fateme Hoseini via llvm-dev wrote: >> >> Hi everyone, >> I am a LLVM newbie. I need to write a machinefunction pass for my >> project. This should be an analyzer of...

On 6/15/2018 11:58 AM, Muhui Jiang wrote: > Is it possible to dump both the frame setup/cleanup MIR and the MIR I > have at this moment? You can dump the MIR after each pass with -mllvm -print-after-all. Look for "Prologue/Epilogue Insertion". -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

...e into >>>> llc and use stop-before to get the mir just before the if-converter pass, >>>> eg: `llc -stop-before=if-converter -simplify-mir -o test.mir test.ll`. >>>> >>>> Also there is a MIR language reference: >>>> https://llvm.org/docs/MIRLangRef.html which has some of the limitations >>>> documented, as well as tips for further simplifying the generated mir if >>>> need be. >>>> >>>> Regards, >>>> Sean >>>> >>>> On Mon, Mar 19, 2018 at 7:53 PM, Valentin Chu...