Triple Yang
2012-Jul-23 07:02 UTC
[LLVMdev] Differences and Relationship between VLIW scheduler and VLIW packetizer?
Hi, I notice that there exist some classes for VLIW packetizing and other classes for VLIW scheduling. Apparently these classes share something in common. Can someone explain why they should have separate implementation (i.e., in different function passes)? Best regards. -- 杨勇勇 (Yang Yongyong)
Ivan Llopard
2012-Jul-23 08:09 UTC
[LLVMdev] Differences and Relationship between VLIW scheduler and VLIW packetizer?
Hi Yang, They have different implementations because they don't do the same thing and don't rely on the same structures. VLIW scheduling works on the SelectionDAG, right after the instruction selection, and it will schedule the DAG but it will not build any packet. The VLIW packetizer has been designed to work with machine instructions, using the ScheduleDAGInstr, and it does build packets (not scheduling). Both implementations have something in common, the DFAPacketizer which provides information about valid instruction packets. The former use it as a parameter for the computation of scheduling priorities and the latter use it to actually build the packets. I've read in this list that scheduling on the selectionDAG is likely to be replaced by the machine scheduling in the near future. Ivan On 23/07/2012 09:02, Triple Yang wrote:> Hi, > > I notice that there exist some classes for VLIW packetizing and other > classes for VLIW scheduling. > Apparently these classes share something in common. Can someone > explain why they > should have separate implementation (i.e., in different function passes)? > > Best regards. > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120723/b928bfeb/attachment.html>
Triple Yang
2012-Jul-23 10:23 UTC
[LLVMdev] Differences and Relationship between VLIW scheduler and VLIW packetizer?
Thank you, Ivan. In my opinion, it seems more natual for a vliw scheduler working on machine instruction lists, since information like structure hazards can be preserved for packetizing and need not to re-compute it. Happy to see new implementation of instruction scheduling coming true. Best regards. 2012/7/23 Ivan Llopard <ivanllopard at gmail.com>:> Hi Yang, > > They have different implementations because they don't do the same thing and > don't rely on the same structures. VLIW scheduling works on the > SelectionDAG, right after the instruction selection, and it will schedule > the DAG but it will not build any packet. The VLIW packetizer has been > designed to work with machine instructions, using the ScheduleDAGInstr, and > it does build packets (not scheduling). Both implementations have something > in common, the DFAPacketizer which provides information about valid > instruction packets. The former use it as a parameter for the computation of > scheduling priorities and the latter use it to actually build the packets. > I've read in this list that scheduling on the selectionDAG is likely to be > replaced by the machine scheduling in the near future. > > Ivan > > > On 23/07/2012 09:02, Triple Yang wrote: > > Hi, > > I notice that there exist some classes for VLIW packetizing and other > classes for VLIW scheduling. > Apparently these classes share something in common. Can someone > explain why they > should have separate implementation (i.e., in different function passes)? > > Best regards. > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-- 杨勇勇 (Yang Yongyong)
Reasonably Related Threads
- [LLVMdev] Differences and Relationship between VLIW scheduler and VLIW packetizer?
- [LLVMdev] VLIW code generation for LLVM backend
- [LLVMdev] VLIW code generation for LLVM backend
- [LLVMdev] VLIW code generation for LLVM backend
- [LLVMdev] VLIW code generation for LLVM backend