llvm dev - Jun 2012 - [LLVMdev] How to define macros in a tablegen file?

Hi,

I was wondering if there is a way to specify macros to help shorten
rewriting patterns like these:

def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
  (v4i8
   (VTRUNEHB
    (v4i16
     (VTRUNEWH
      (v2i32
       (VMPYH
        (v2i16
         (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))), subreg_hireg)),
        (v2i16
         (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))), subreg_hireg)))),
      (v2i32
       (VMPYH
        (v2i16
         (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))), subreg_loreg)),
        (v2i16
         (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))), subreg_loreg)))))))
  )>;


Basically if we have a way to name a dag foo to be this:
(EXTRACT_SUBREG (v4i16 (VSXTBH $X)), $Y)

and bar to stand for this:
(v2i32 (VMPYH (v2i16 (foo $X, $Z)), (v2i16 (foo $Y, $Z))))

then, I could write the same pattern in a shorter format:
def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
  (v4i8
   (VTRUNEHB
    (v4i16
     (VTRUNEWH (bar IntRegs:$a, IntRegs:$b, subreg_hireg),
               (bar IntRegs:$a, IntRegs:$b, subreg_loreg)))))
  >;

Thanks,
Sebastian
-- 
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum

If the patterns only include SDNodes, then pattern fragments will work.

I might be wrong, but I've yet to find a way to do it with machine
instructions, which is what you seem to have here.

Micah
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at
cs.uiuc.edu]
> On Behalf Of Sebastian Pop
> Sent: Tuesday, June 19, 2012 3:39 PM
> To: llvmdev at cs.uiuc.edu
> Subject: [LLVMdev] How to define macros in a tablegen file?
> 
> Hi,
> 
> I was wondering if there is a way to specify macros to help shorten
> rewriting patterns like these:
> 
> def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
>   (v4i8
>    (VTRUNEHB
>     (v4i16
>      (VTRUNEWH
>       (v2i32
>        (VMPYH
>         (v2i16
>          (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))),
> subreg_hireg)),
>         (v2i16
>          (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))),
> subreg_hireg)))),
>       (v2i32
>        (VMPYH
>         (v2i16
>          (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))),
> subreg_loreg)),
>         (v2i16
>          (EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))),
> subreg_loreg)))))))
>   )>;
> 
> 
> Basically if we have a way to name a dag foo to be this:
> (EXTRACT_SUBREG (v4i16 (VSXTBH $X)), $Y)
> 
> and bar to stand for this:
> (v2i32 (VMPYH (v2i16 (foo $X, $Z)), (v2i16 (foo $Y, $Z))))
> 
> then, I could write the same pattern in a shorter format:
> def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
>   (v4i8
>    (VTRUNEHB
>     (v4i16
>      (VTRUNEWH (bar IntRegs:$a, IntRegs:$b, subreg_hireg),
>                (bar IntRegs:$a, IntRegs:$b, subreg_loreg)))))
>   >;
> 
> Thanks,
> Sebastian
> --
> Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

Hi Micah,

On Tue, Jun 19, 2012 at 6:29 PM, Villmow, Micah <Micah.Villmow at amd.com>
wrote:
> If the patterns only include SDNodes, then pattern fragments will work.
>
> I might be wrong, but I've yet to find a way to do it with machine
instructions, which is what you seem to have here.
I found in the Cell SPU port: lib/Target/CellSPU/SPUMathInstr.td
some examples using code fragments.  I will try to see if that makes
my code more readable.

Thanks for your suggestions,
Sebastian
-- 
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum