Tom Stellard
2012-Jan-20 00:21 UTC
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
Hi, I'm trying to create a Pattern that looks something like this: def my_inst : Instruction < let OutOperandList = (outs REG:$dst); let InOperandList = (ins imm:$src); let Uses = [R0];>def int_my_intrinsic : Intrinsic < [llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;def : Pattern < (int_my_intrinsic imm:$a, imm:$b, imm:$c), [(set R0, (MOV_IMM imm:$a)), (my_inst (my_inst $b), $c)]>;When I try to run this through tablegen, I get this error: "Cannot handle instructions producing instructions with temporaries yet!" What does this error message mean? Is what I'm trying to do even possible with tablegen? Thanks, Tom
Jim Grosbach
2012-Jan-20 20:12 UTC
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
TableGen can do this if the second instruction uses the result of the first as an input, but not if they're completely separate like this. The output pattern must be in the form of a DAG. You probably want to do this via a custom lowering and/or pseudo instructions that get expanded after isle. -Jim On Jan 19, 2012, at 4:21 PM, Tom Stellard wrote:> Hi, > > I'm trying to create a Pattern that looks something like this: > > def my_inst : Instruction < > let OutOperandList = (outs REG:$dst); > let InOperandList = (ins imm:$src); > let Uses = [R0]; >> > > def int_my_intrinsic : Intrinsic < > [llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [] >> ; > > def : Pattern < > (int_my_intrinsic imm:$a, imm:$b, imm:$c), > [(set R0, (MOV_IMM imm:$a)), > (my_inst (my_inst $b), $c)] >> ; > > When I try to run this through tablegen, I get this error: > "Cannot handle instructions producing instructions with temporaries > yet!" > > What does this error message mean? Is what I'm trying to do even > possible with tablegen? > > Thanks, > Tom > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Arsen Hakobyan
2014-Aug-14 07:05 UTC
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
Hi all, I would like to be sure that Tablegen still does not support completely separate multiple instruction generation, and the only way is to write costume code (may be in TargetISelDAGToDAG class) to get the needed result. Dear Tom, do you found other solution (using Tablegen tool) for this? Thanks, Arsen -- View this message in context: http://llvm.1065342.n5.nabble.com/Tablegen-How-to-define-a-Pattern-with-multiple-result-instructions-tp44115p71453.html Sent from the LLVM - Dev mailing list archive at Nabble.com.
Maybe Matching Threads
- [LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
- [LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
- [LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
- [LLVMdev] LLVM Backend DAGToDAGISel INTRINSIC
- [LLVMdev] Creation of Intrinsics with Pointer Return Types