Displaying 2 results from an estimated 2 matches for "mov_imm".
2012 Jan 20
2
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
...ction <
let OutOperandList = (outs REG:$dst);
let InOperandList = (ins imm:$src);
let Uses = [R0];
>
def int_my_intrinsic : Intrinsic <
[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []
>;
def : Pattern <
(int_my_intrinsic imm:$a, imm:$b, imm:$c),
[(set R0, (MOV_IMM imm:$a)),
(my_inst (my_inst $b), $c)]
>;
When I try to run this through tablegen, I get this error:
"Cannot handle instructions producing instructions with temporaries
yet!"
What does this error message mean? Is what I'm trying to do even
possible with tablegen?
Thanks,
Tom
2013 Oct 09
4
[LLVMdev] Subregister liveness tracking
On Oct 8, 2013, at 2:06 PM, Akira Hatanaka <ahatanak at gmail.com> wrote:
> What I didn't mention in r192119 is that mthi/lo clobbers the other sub-register only if the contents of hi and lo are produced by mult or other arithmetic instructions (div, madd, etc.) It doesn't have this side-effect if it is produced by another mthi/lo. So I don't think making mthi/lo clobber the