llvm dev - Sep 2006 - [LLVMdev] how to declare that two registers must be different

The ARM has a multiply instruction of the form
Rd=Rm*Rs

where Rd != Rm. How can I add this requirement to the instruction definition?

Thanks,
Rafael

On Sun, 17 Sep 2006, [UTF-8] Rafael Esp?ndola wrote:
> The ARM has a multiply instruction of the form Rd=Rm*Rs where Rd != Rm. 
> How can I add this requirement to the instruction definition?
Unfortunately there is currently no great way to do this.  Some options 
are:

1. Pin one operand to a specific register, one that isn't allocated (e.g.
    R12).  Use copyto/fromreg to get to it.  They other would be allocated
    to some different reg.
2. Allocate like normal, and then do a post-pass.  The post-pass would
    scan for the bad instruction, and if found insert compensation code to
    copy in/out of some other reg (again, R12 would a natural choice).

I'd like to make the regalloc interfaces more powerful to be able to 
capture this sort of thing, but I'm not very familiar with ARM.  What 
specific instructions are problematic?  MUL looks ok in my copy of the ARM 
ARM.

-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/

Hi Chris,
> On Sun, 17 Sep 2006, [UTF-8] Rafael Esp?ndola wrote:
> > The ARM has a multiply instruction of the form Rd=Rm*Rs where Rd !>
> Rm.  How can I add this requirement to the instruction definition?
> 
> ...
> 
> I'd like to make the regalloc interfaces more powerful to be able to
> capture this sort of thing, but I'm not very familiar with ARM.  What
> specific instructions are problematic?  MUL looks ok in my copy of the
> ARM ARM.
MUL (and MLA, MuLtiply and Accumulate) are the two well known ones.  The
very unofficial, but historically good,
http://www.pinknoise.demon.co.uk/ARMinstrs/ARMinstrs.html#Multiplication
says

    "The destination register shall not be the same as the operand
    register Rm. R15 shall not be used as an operand or as the
    destination register."

Then there's the long multiplication instruction on some ARM
architectures,

    (U|S)(MUL|MLA)L Rl, Rh, Rm, Rs

which calculate Rm * Rs and overwrite or accumulate the 64-bit result
into Rl and Rh.  pinknoise says

    "The program counter, R15 should not be used. Rh, Rl and Rm should
    be different."

which allows Rs to be the same as one of the other three.

Then, for the load and store multiple instructions, LDM and STM, the R15
should not be used as the base register.  Neither should R15 be the
destination for an MCR, Move to Co-processor register from Register.

These are some examples, hopefully enough to alter the regalloc
interface to cope.

Cheers,


Ralph.