llvm dev - Aug 2006 - [LLVMdev] a target must have floating point support?

I am trying to add an call to computeRegisterProperties in the ARM
target. The problem is that, after adding it, llc fails with

Assertion `isTypeLegal(MVT::f64) && "Target does not support
FP?"' failed

The assert is at TargetLowering.cpp:138.

Why is FP required? Most ARMs don't have an FPU. Should I add a fake
register class for MVT::f64?

Thanks,
Rafael