Ilia Mirkin
2014-Sep-01 17:23 UTC
[Nouveau] [PATCH 1/3] nv50: set the miptree address when clearing bo's in vp2 init
The mt address is about to be used more, make sure it's set appropriately. Reported-by: Emil Velikov <emil.l.velikov at gmail.com> Tested-by: Emil Velikov <emil.l.velikov at gmail.com> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2 10.3" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/nv50/nv84_video.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c index a39f572..b26e1ee 100644 --- a/src/gallium/drivers/nouveau/nv50/nv84_video.c +++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c @@ -482,12 +482,14 @@ nv84_create_decoder(struct pipe_context *context, mip.level[0].pitch = surf.width * 4; mip.base.domain = NOUVEAU_BO_VRAM; mip.base.bo = dec->mbring; + mip.base.address = dec->mbring->offset; context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760); surf.offset = dec->vpring->size / 2 - 0x1000; surf.width = 1024; surf.height = 1; mip.level[0].pitch = surf.width * 4; mip.base.bo = dec->vpring; + mip.base.address = dec->vpring->offset; context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); surf.offset = dec->vpring->size - 0x1000; context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); -- 1.8.5.5
Ilia Mirkin
2014-Sep-01 17:23 UTC
[Nouveau] [PATCH 2/3] nv50: mt address may not be the underlying bo's start address
With VP2, nv50_miptree is faked because the underlying bo's have to be laid out in a certain way. This is done by adjusting the address. Make sure that blits (and everything else for consistency) use the mt address rather than the bo address as a base. This fixes retrieving chroma plane with VDPAU. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255 Tested-by: Emil Velikov <emil.l.velikov at gmail.com> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2 10.3" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 4 ++-- src/gallium/drivers/nouveau/nv50/nv50_surface.c | 16 ++++++++-------- src/gallium/drivers/nouveau/nv50/nv50_transfer.c | 2 ++ 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c index 1dcb961..519de15 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c @@ -54,8 +54,8 @@ nv50_validate_fb(struct nv50_context *nv50) assert(mt->layout_3d || !array_mode || array_size == 1); BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 5); - PUSH_DATAh(push, bo->offset + sf->offset); - PUSH_DATA (push, bo->offset + sf->offset); + PUSH_DATAh(push, mt->base.address + sf->offset); + PUSH_DATA (push, mt->base.address + sf->offset); PUSH_DATA (push, nv50_format_table[sf->base.format].rt); if (likely(nouveau_bo_memtype(bo))) { PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c index 600f4f9..8ec4a5f 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c @@ -114,8 +114,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst, PUSH_DATA (push, mt->level[level].pitch); PUSH_DATA (push, width); PUSH_DATA (push, height); - PUSH_DATAh(push, bo->offset + offset); - PUSH_DATA (push, bo->offset + offset); + PUSH_DATAh(push, mt->base.address + offset); + PUSH_DATA (push, mt->base.address + offset); } else { BEGIN_NV04(push, SUBC_2D(mthd), 5); PUSH_DATA (push, format); @@ -126,8 +126,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst, BEGIN_NV04(push, SUBC_2D(mthd + 0x18), 4); PUSH_DATA (push, width); PUSH_DATA (push, height); - PUSH_DATAh(push, bo->offset + offset); - PUSH_DATA (push, bo->offset + offset); + PUSH_DATAh(push, mt->base.address + offset); + PUSH_DATA (push, mt->base.address + offset); } #if 0 @@ -299,8 +299,8 @@ nv50_clear_render_target(struct pipe_context *pipe, BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); PUSH_DATA (push, 1); BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); - PUSH_DATAh(push, bo->offset + sf->offset); - PUSH_DATA (push, bo->offset + sf->offset); + PUSH_DATAh(push, mt->base.address + sf->offset); + PUSH_DATA (push, mt->base.address + sf->offset); PUSH_DATA (push, nv50_format_table[dst->format].rt); PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); PUSH_DATA (push, mt->layer_stride >> 2); @@ -381,8 +381,8 @@ nv50_clear_depth_stencil(struct pipe_context *pipe, nv50->scissors_dirty |= 1; BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5); - PUSH_DATAh(push, bo->offset + sf->offset); - PUSH_DATA (push, bo->offset + sf->offset); + PUSH_DATAh(push, mt->base.address + sf->offset); + PUSH_DATA (push, mt->base.address + sf->offset); PUSH_DATA (push, nv50_format_table[dst->format].rt); PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); PUSH_DATA (push, mt->layer_stride >> 2); diff --git a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c index f716052..fc6b24a 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c @@ -24,6 +24,8 @@ nv50_m2mf_rect_setup(struct nv50_m2mf_rect *rect, rect->bo = mt->base.bo; rect->domain = mt->base.domain; rect->base = mt->level[l].offset; + if (mt->base.bo->offset != mt->base.address) + rect->base += mt->base.address - mt->base.bo->offset; rect->pitch = mt->level[l].pitch; if (util_format_is_plain(res->format)) { rect->width = w << mt->ms_x; -- 1.8.5.5
Ilia Mirkin
2014-Sep-01 17:23 UTC
[Nouveau] [PATCH 3/3] nv50: attach the buffer bo to the miptree structures
The current code... makes no sense. Use nouveau_bo_ref to attach the bo to the exposed resource so as to have the proper lifetime guarantees. Tested-by: Emil Velikov <emil.l.velikov at gmail.com> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2 10.3" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/nv50/nv84_video.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c index b26e1ee..b42de20 100644 --- a/src/gallium/drivers/nouveau/nv50/nv84_video.c +++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c @@ -685,17 +685,14 @@ nv84_video_buffer_create(struct pipe_context *pipe, bo_size, &cfg, &buffer->full)) goto error; - mt0->base.bo = buffer->interlaced; + nouveau_bo_ref(buffer->interlaced, &mt0->base.bo); mt0->base.domain = NOUVEAU_BO_VRAM; - mt0->base.offset = 0; - mt0->base.address = buffer->interlaced->offset + mt0->base.offset; - nouveau_bo_ref(buffer->interlaced, &empty); + mt0->base.address = buffer->interlaced->offset; - mt1->base.bo = buffer->interlaced; + nouveau_bo_ref(buffer->interlaced, &mt1->base.bo); mt1->base.domain = NOUVEAU_BO_VRAM; - mt1->base.offset = mt0->layer_stride * 2; - mt1->base.address = buffer->interlaced->offset + mt1->base.offset; - nouveau_bo_ref(buffer->interlaced, &empty); + mt1->base.offset = mt0->total_size; + mt1->base.address = buffer->interlaced->offset + mt0->total_size; memset(&sv_templ, 0, sizeof(sv_templ)); for (component = 0, i = 0; i < 2; ++i ) { -- 1.8.5.5
Seemingly Similar Threads
- [PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
- [PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
- [PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
- [PATCH v2] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0
- [PATCH] nv50: H.264/MPEG2 decoding support via VP2, available on NV84-NV96, NVA0