llvm dev - May 2017 - copyPhysReg() with undef source operand (llvm-stress)

Hi,

I would like some advice on how to lower a COPY in copyPhysReg(), where 
the source operand is undef, because it seems this flag is not available.

With llvm-stress I got (on SystemZ):

B#0: derived from LLVM BB %BB
     Live Ins: %R2D %R4D %R6D
         %vreg14<def> = IMPLICIT_DEF; GR64Bit:%vreg14
         %vreg53<def> = IMPLICIT_DEF; GR128Bit:%vreg53
         %vreg55<def> = LLILL 0; GR64Bit:%vreg55
         %vreg54<def,tied1> = INSERT_SUBREG %vreg53<tied0>, %vreg55,
subreg_h64; GR128Bit:%vreg54,%vreg53 GR64Bit:%vreg55
         %vreg15<def,tied1> = INSERT_SUBREG %vreg54<tied0>, %vreg14,
subreg_l64; GR128Bit:%vreg15,%vreg54 GR64Bit:%vreg14

-> Process Implicit Definitions

         %vreg55<def> = LLILL 0; GR64Bit:%vreg55
         %vreg54<def,tied1> = INSERT_SUBREG %vreg53<undef,tied0>, 
%vreg55, subreg_h64; GR128Bit:%vreg54,%vreg53 GR64Bit:%vreg55
         %vreg15<def,tied1> = INSERT_SUBREG %vreg54<tied0>, 
%vreg14<undef>, subreg_l64; GR128Bit:%vreg15,%vreg54 GR64Bit:%vreg14

-> Two-Address instruction pass

         %vreg55<def> = LLILL 0; GR64Bit:%vreg55
         %vreg54:subreg_h64<def,read-undef> = COPY %vreg55<kill>; 
GR128Bit:%vreg54 GR64Bit:%vreg55
         %vreg15<def> = COPY %vreg54<kill>; GR128Bit:%vreg15,%vreg54
         %vreg15:subreg_l64<def> = COPY %vreg14<undef>;
GR128Bit:%vreg15
GR64Bit:%vreg14

-> reg alloc

         %R1D<def> = LLILL 0
         %R12D<def> = COPY %R1D<kill>, %R12Q<imp-def>
         %R13D<def> = COPY %R0D<undef>, %R12Q<imp-use,kill>,
%R12Q<imp-def>

-> post-ra pseudo expansion

         %R1D<def> = LLILL 0
         %R12D<def> = LGR %R1D<kill>, %R12Q<imp-def>
         %R13D<def> = LGR %R0D, %R12Q<imp-use,kill>,
%R12Q<imp-def>

*** Bad machine code: Using an undefined physical register ***
- function:    autogen_SD13338
- basic block: BB#0 BB (0x4deba88)
- instruction: %R13D<def> = LGR
- operand 1:   %R0D
LLVM ERROR: Found 1 machine code errors.


thanks / Jonas

> On May 4, 2017, at 8:44 AM, Jonas Paulsson via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> Hi,
> 
> I would like some advice on how to lower a COPY in copyPhysReg(), where the
source operand is undef, because it seems this flag is not available.
> 
> With llvm-stress I got (on SystemZ):
> 
> B#0: derived from LLVM BB %BB
>    Live Ins: %R2D %R4D %R6D
>        %vreg14<def> = IMPLICIT_DEF; GR64Bit:%vreg14
>        %vreg53<def> = IMPLICIT_DEF; GR128Bit:%vreg53
>        %vreg55<def> = LLILL 0; GR64Bit:%vreg55
>        %vreg54<def,tied1> = INSERT_SUBREG %vreg53<tied0>,
%vreg55, subreg_h64; GR128Bit:%vreg54,%vreg53 GR64Bit:%vreg55
>        %vreg15<def,tied1> = INSERT_SUBREG %vreg54<tied0>,
%vreg14, subreg_l64; GR128Bit:%vreg15,%vreg54 GR64Bit:%vreg14
> 
> -> Process Implicit Definitions
> 
>        %vreg55<def> = LLILL 0; GR64Bit:%vreg55
>        %vreg54<def,tied1> = INSERT_SUBREG %vreg53<undef,tied0>,
%vreg55, subreg_h64; GR128Bit:%vreg54,%vreg53 GR64Bit:%vreg55
>        %vreg15<def,tied1> = INSERT_SUBREG %vreg54<tied0>,
%vreg14<undef>, subreg_l64; GR128Bit:%vreg15,%vreg54 GR64Bit:%vreg14
> 
> -> Two-Address instruction pass
> 
>        %vreg55<def> = LLILL 0; GR64Bit:%vreg55
>        %vreg54:subreg_h64<def,read-undef> = COPY %vreg55<kill>;
GR128Bit:%vreg54 GR64Bit:%vreg55
>        %vreg15<def> = COPY %vreg54<kill>;
GR128Bit:%vreg15,%vreg54
>        %vreg15:subreg_l64<def> = COPY %vreg14<undef>;
GR128Bit:%vreg15 GR64Bit:%vreg14
> 
> -> reg alloc
> 
>        %R1D<def> = LLILL 0
>        %R12D<def> = COPY %R1D<kill>, %R12Q<imp-def>
>        %R13D<def> = COPY %R0D<undef>,
%R12Q<imp-use,kill>, %R12Q<imp-def>
I guess this can be interpreted as an identity copy? (the R0D is undef so you
could just as well replace it with R13D here). So maybe you can simply extend
the identify copy handling case ExpandPostRA::LowerCopy() instead.

(If that doesn't work then I wouldn't mind if you extend the
copyPhysReg() interface with some undef flag)

- Matthiase