From 7886ea2feba430067b169b3404911c1e9d7e88f9 Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Fri, 8 Nov 2013 02:00:37 +0800
Subject: [PATCH 3/3] X86: MPX IA32_BNDCFGS msr handle
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Acked-by: Liu Jinsong <jinsong.liu@intel.com>
---
xen/arch/x86/hvm/vmx/vmcs.c | 7 +++++--
xen/include/asm-x86/hvm/vmx/vmcs.h | 2 ++
xen/include/asm-x86/msr-index.h | 2 ++
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index 6526504..34b7246 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -269,7 +269,8 @@ static int vmx_init_vmcs_config(void)
}
min = VM_EXIT_ACK_INTR_ON_EXIT;
- opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT;
+ opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT |
+ VM_EXIT_CLEAR_BNDCFGS;
min |= VM_EXIT_IA32E_MODE;
_vmx_vmexit_control = adjust_vmx_controls(
"VMExit Control", min, opt, MSR_IA32_VMX_EXIT_CTLS,
&mismatch);
@@ -283,7 +284,7 @@ static int vmx_init_vmcs_config(void)
_vmx_pin_based_exec_control &= ~ PIN_BASED_POSTED_INTERRUPT;
min = 0;
- opt = VM_ENTRY_LOAD_GUEST_PAT;
+ opt = VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_BNDCFGS;
_vmx_vmentry_control = adjust_vmx_controls(
"VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS,
&mismatch);
@@ -916,6 +917,8 @@ static int construct_vmcs(struct vcpu *v)
v->arch.hvm_vmx.msr_bitmap = msr_bitmap;
__vmwrite(MSR_BITMAP, virt_to_maddr(msr_bitmap));
+ if ( cpu_has_mpx )
+ vmx_disable_intercept_for_msr(v, MSR_IA32_BNDCFGS, MSR_TYPE_R |
MSR_TYPE_W);
vmx_disable_intercept_for_msr(v, MSR_FS_BASE, MSR_TYPE_R | MSR_TYPE_W);
vmx_disable_intercept_for_msr(v, MSR_GS_BASE, MSR_TYPE_R | MSR_TYPE_W);
vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS, MSR_TYPE_R |
MSR_TYPE_W);
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h
b/xen/include/asm-x86/hvm/vmx/vmcs.h
index b50352f..9a52300 100644
--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
@@ -185,6 +185,7 @@ extern u32 vmx_pin_based_exec_control;
#define VM_EXIT_SAVE_GUEST_EFER 0x00100000
#define VM_EXIT_LOAD_HOST_EFER 0x00200000
#define VM_EXIT_SAVE_PREEMPT_TIMER 0x00400000
+#define VM_EXIT_CLEAR_BNDCFGS 0x00800000
extern u32 vmx_vmexit_control;
#define VM_ENTRY_IA32E_MODE 0x00000200
@@ -193,6 +194,7 @@ extern u32 vmx_vmexit_control;
#define VM_ENTRY_LOAD_PERF_GLOBAL_CTRL 0x00002000
#define VM_ENTRY_LOAD_GUEST_PAT 0x00004000
#define VM_ENTRY_LOAD_GUEST_EFER 0x00008000
+#define VM_ENTRY_LOAD_BNDCFGS 0x00010000
extern u32 vmx_vmentry_control;
#define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index e597a28..fef97a1 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -56,6 +56,8 @@
#define MSR_IA32_DS_AREA 0x00000600
#define MSR_IA32_PERF_CAPABILITIES 0x00000345
+#define MSR_IA32_BNDCFGS 0x00000D90
+
#define MSR_MTRRfix64K_00000 0x00000250
#define MSR_MTRRfix16K_80000 0x00000258
#define MSR_MTRRfix16K_A0000 0x00000259
--
1.7.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
>>> On 11.11.13 at 09:40, "Liu, Jinsong" <jinsong.liu@intel.com> wrote: > From 7886ea2feba430067b169b3404911c1e9d7e88f9 Mon Sep 17 00:00:00 2001 > From: Liu Jinsong <jinsong.liu@intel.com> > Date: Fri, 8 Nov 2013 02:00:37 +0800 > Subject: [PATCH 3/3] X86: MPX IA32_BNDCFGS msr handle > > Signed-off-by: Xudong Hao <xudong.hao@intel.com> > Acked-by: Liu Jinsong <jinsong.liu@intel.com>This patch clearly is a prereq for enabling support for HVM guests, so it can''t possibly be the last patch in this series.> --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -269,7 +269,8 @@ static int vmx_init_vmcs_config(void) > } > > min = VM_EXIT_ACK_INTR_ON_EXIT; > - opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT; > + opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT | > + VM_EXIT_CLEAR_BNDCFGS; > min |= VM_EXIT_IA32E_MODE; > _vmx_vmexit_control = adjust_vmx_controls( > "VMExit Control", min, opt, MSR_IA32_VMX_EXIT_CTLS, &mismatch); > @@ -283,7 +284,7 @@ static int vmx_init_vmcs_config(void) > _vmx_pin_based_exec_control &= ~ PIN_BASED_POSTED_INTERRUPT; > > min = 0; > - opt = VM_ENTRY_LOAD_GUEST_PAT; > + opt = VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_BNDCFGS; > _vmx_vmentry_control = adjust_vmx_controls( > "VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS, &mismatch); >So up to here the feature is treated as optional. But then no further consequences result when it''s unavailable (in particular in the [hypothetical?] case where the VMX aspects and the CPUID one disagree. This needs to be handled properly. Jan
Jan Beulich wrote:>>>> On 11.11.13 at 09:40, "Liu, Jinsong" <jinsong.liu@intel.com> wrote: >> From 7886ea2feba430067b169b3404911c1e9d7e88f9 Mon Sep 17 00:00:00 >> 2001 From: Liu Jinsong <jinsong.liu@intel.com> >> Date: Fri, 8 Nov 2013 02:00:37 +0800 >> Subject: [PATCH 3/3] X86: MPX IA32_BNDCFGS msr handle >> >> Signed-off-by: Xudong Hao <xudong.hao@intel.com> >> Acked-by: Liu Jinsong <jinsong.liu@intel.com> > > This patch clearly is a prereq for enabling support for HVM guests, > so it can''t possibly be the last patch in this series.So what else do you think we need add to Xudong''s patches, except the points you have listed? Thanks, Jinsong> >> --- a/xen/arch/x86/hvm/vmx/vmcs.c >> +++ b/xen/arch/x86/hvm/vmx/vmcs.c >> @@ -269,7 +269,8 @@ static int vmx_init_vmcs_config(void) } >> >> min = VM_EXIT_ACK_INTR_ON_EXIT; >> - opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT; >> + opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT | >> + VM_EXIT_CLEAR_BNDCFGS; >> min |= VM_EXIT_IA32E_MODE; >> _vmx_vmexit_control = adjust_vmx_controls( >> "VMExit Control", min, opt, MSR_IA32_VMX_EXIT_CTLS, >> &mismatch); @@ -283,7 +284,7 @@ static int vmx_init_vmcs_config(void) >> _vmx_pin_based_exec_control &= ~ >> PIN_BASED_POSTED_INTERRUPT; >> >> min = 0; >> - opt = VM_ENTRY_LOAD_GUEST_PAT; >> + opt = VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_BNDCFGS; >> _vmx_vmentry_control = adjust_vmx_controls( >> "VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS, >> &mismatch); >> > > So up to here the feature is treated as optional. But then no > further consequences result when it''s unavailable (in particular > in the [hypothetical?] case where the VMX aspects and the CPUID > one disagree. This needs to be handled properly. > > Jan
>>> On 15.11.13 at 17:35, "Liu, Jinsong" <jinsong.liu@intel.com> wrote: > Jan Beulich wrote: >>>>> On 11.11.13 at 09:40, "Liu, Jinsong" <jinsong.liu@intel.com> wrote: >>> From 7886ea2feba430067b169b3404911c1e9d7e88f9 Mon Sep 17 00:00:00 >>> 2001 From: Liu Jinsong <jinsong.liu@intel.com> >>> Date: Fri, 8 Nov 2013 02:00:37 +0800 >>> Subject: [PATCH 3/3] X86: MPX IA32_BNDCFGS msr handle >>> >>> Signed-off-by: Xudong Hao <xudong.hao@intel.com> >>> Acked-by: Liu Jinsong <jinsong.liu@intel.com> >> >> This patch clearly is a prereq for enabling support for HVM guests, >> so it can''t possibly be the last patch in this series. > > So what else do you think we need add to Xudong''s patches, except the points > you have listed?I don''t think there was anything; above I was just pointing out the ordering of the patches was apparently wrong. Jan