Add acpi C3 support for x86. C3 & deep C state will need to do ARB_DIS or cache flush. ARB_DIS should be done within the last cpu which is ready for C3. Bus master activities are checked and recorded for C state promotion/demotion judgement. C3 is disabled by default, till TSC/APIC stop issues resolved. Adding cmdline option "max_cstate=3" can enable C3. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel