Steven: In CSET 11673, I noticed that you add another set of irr (irr_xen). The comments say: [XEN][HVM] Make sure that the interrupt which event channel events come in on is level triggered rather than edge triggered, since it''s a PCI device. This is complicated by the possibility that another PCI device could be on the same interrupt; the workaround is to have two irr registers for the PIC and APIC, and have qemu and Xen generated interrupts go into different ones. In previous model (before CSET 11673), the correctness is guaranateed in guest platform where the IRQ # used for this pseudo IRQ (xen event channel) is exclusively occupied by the xen event channel. It looks like you want to share this IRQ # with other platform IRQ. I am not sure if this is necessary rather than the complexity. thx,eddie _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel