Xiaofeng Ling
2005-Sep-05 04:36 UTC
[Xen-devel] [PATCH][VT]add a fake pci device for event channel in device model
This patch adds a fake pci device for event channel in device model
The device will be used by para-driver support in unmodified guest.
Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
diff -r 287d36b46fa3 tools/ioemu/hw/pc.c
--- a/tools/ioemu/hw/pc.c Tue Aug 30 20:36:49 2005
+++ b/tools/ioemu/hw/pc.c Fri Sep 2 22:46:40 2005
@@ -546,6 +546,7 @@
pci_ne2000_init(pci_bus, &nd_table[i]);
}
pci_piix3_ide_init(pci_bus, bs_table);
+ pci_xen_evtchn_init(pci_bus);
#ifdef APIC_SUPPORT
IOAPICInit();
#endif
diff -r 287d36b46fa3 tools/ioemu/target-i386-dm/Makefile
--- a/tools/ioemu/target-i386-dm/Makefile Tue Aug 30 20:36:49 2005
+++ b/tools/ioemu/target-i386-dm/Makefile Fri Sep 2 22:46:40 2005
@@ -270,7 +270,7 @@
endif
# Hardware support
-VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o
+VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o xen_evtchn.o
VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o port-e9.o
VL_OBJS+= cirrus_vga.o pcnet.o
diff -r 287d36b46fa3 tools/ioemu/hw/xen_evtchn.c
--- /dev/null Tue Aug 30 20:36:49 2005
+++ b/tools/ioemu/hw/xen_evtchn.c Fri Sep 2 22:46:40 2005
@@ -0,0 +1,145 @@
+/*
+ * XEN event channel fake pci devicel
+ *
+ * Copyright (c) 2003-2004 Intel Corp.
+ *
+ * Permission is hereby granted, free of charge, to any person
obtaining a copy
+ * of this software and associated documentation files (the
"Software"), to deal
+ * in the Software without restriction, including without limitation
the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or
sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "vl.h"
+
+typedef struct XenEvtchnState {
+ int irq;
+ PCIDevice *pci_dev;
+}XenEvtchnState;
+
+static void evtchn_reset(XenEvtchnState *s)
+{
+}
+
+static void evtchn_update_irq(XenEvtchnState *s)
+{
+ if (s->irq == 16) {
+ /* PCI irq */
+ pci_set_irq(s->pci_dev, 0, 0);
+ } else {
+ /* ISA irq */
+ pic_set_irq(s->irq, 0);
+ }
+}
+
+static void evtchn_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+{
+}
+
+static uint32_t evtchn_ioport_read(void *opaque, uint32_t addr)
+{
+ return 0;
+}
+
+typedef struct PCIXenEvtchnState {
+ PCIDevice dev;
+ XenEvtchnState evtchn;
+} PCIXenEvtchnState;
+
+static void evtchn_map(PCIDevice *pci_dev, int region_num,
+ uint32_t addr, uint32_t size, int type)
+{
+ PCIXenEvtchnState *d = (PCIXenEvtchnState *)pci_dev;
+ XenEvtchnState *s = &d->evtchn;
+
+ register_ioport_write(addr, 16, 1, evtchn_ioport_write, s);
+ register_ioport_read(addr, 16, 1, evtchn_ioport_read, s);
+}
+
+static uint32_t xen_mmio_read(void *opaque, target_phys_addr_t addr)
+{
+ fprintf(stderr, "Warning: try read from evtchn mmio space\n");
+ return 0;
+}
+
+static void xen_mmio_write(void *opaque, target_phys_addr_t addr,
+ uint32_t val)
+{
+ fprintf(stderr, "Warning: try write to evtchn mmio space\n");
+ return;
+}
+
+static CPUReadMemoryFunc *xen_evtchn_mmio_read[3] = {
+ xen_mmio_read,
+ xen_mmio_read,
+ xen_mmio_read,
+};
+
+static CPUWriteMemoryFunc *xen_evtchn_mmio_write[3] = {
+ xen_mmio_write,
+ xen_mmio_write,
+ xen_mmio_write,
+};
+
+static void xen_evtchn_pci_mmio_map(PCIDevice *d, int region_num,
+ uint32_t addr, uint32_t size, int type)
+{
+ int mmio_io_addr;
+ XenEvtchnState *s = &((PCIXenEvtchnState *)d)->evtchn;
+
+ mmio_io_addr = cpu_register_io_memory(0,
+ xen_evtchn_mmio_read,
+ xen_evtchn_mmio_write, s);
+
+ cpu_register_physical_memory(addr, 0x1000000, mmio_io_addr);
+}
+
+void pci_xen_evtchn_init(PCIBus *bus)
+{
+ PCIXenEvtchnState *d;
+ XenEvtchnState *s;
+ uint8_t *pci_conf;
+
+ d = (PCIXenEvtchnState *)pci_register_device(bus,
+ "xen-evtchn",
sizeof(PCIXenEvtchnState),
+ -1,
+ NULL, NULL);
+ pci_conf = d->dev.config;
+ pci_conf[0x00] = 0xfd;
+ pci_conf[0x01] = 0xff;
+ pci_conf[0x02] = 0x01;
+ pci_conf[0x03] = 0x01;
+ pci_conf[0x04] = 0x01; //PCI_COMMAND_IOACCESS
+ pci_conf[0x0a] = 0x80; //
+ pci_conf[0x0b] = 0x07;
+ pci_conf[0x0e] = 0x00; // header_type
+ pci_conf[0x3c] = 0; // interrupt line 0
+ pci_conf[0x3d] = 1; // interrupt pin 0
+
+ pci_register_io_region(&d->dev, 0, 0x100,
+ PCI_ADDRESS_SPACE_IO, evtchn_map);
+
+ /* reserve 16MB mmio address for share memory*/
+ pci_register_io_region((PCIDevice *)d, 1, 0x1000000,
+ PCI_ADDRESS_SPACE_MEM_PREFETCH, xen_evtchn_pci_mmio_map);
+
+ s = &d->evtchn;
+ s->irq = 16; // PCI interrupt
+ s->pci_dev = (PCIDevice *)d;
+ evtchn_reset(s);
+
+ /* XXX: instance number ? */
+ register_savevm("evtchn", 0, 1, generic_pci_save,
generic_pci_load,
+ &d->dev);
+}
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