similar to: [PATCH 2 of 8] FPU: create FPU init and destroy functions

This patch enables LWP related CPUID to HVM guests. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch initializes VMCB CR4 and shadow CR4 with 0 when VMCB is being constructed under nested paging mode. It complies with recent reset_to_realmode change in hvmloader. Signed-off-by: Wei Huang (wei.huang2@amd.com <mailto:wei.huang2@amd.com> ) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

This patch changes hap parameter from boolean to integer. So users can disable and enable hap using "hap=0" and "hap=1". It also prints out nested paging message under SVM. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro

This patch implements flush by asid feature for AMD CPUs. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd

The attached patch fixes the save/restore issue seen with 32bit Windows guest VMs. The root cause is that current Xen doesn''t intercept SYSENTER-related MSRs for 32bit guest VMs. As a result, the guest_sysenter_xxx fields contain incorrect values and shouldn''t be used for save/restore. This patch checks the LMA bit of EFER register in the save/restore code path. Please apply it

In p2m.c (line 197 and line 550), the code assumes the number of L3 P2M table entries is 8 (under PAE mode). According to Intel and AMD specs, it is 4. Could someone explain this discrepancy? Is it a bug? -Wei _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values

Patch 2/2 - Add flag to indicate that an exception event needs injecting, and to delay the ext interrupt injection. Remove unnecessary check of RFLAGS.IF for ExtInt injection. Applies cleanly to xen-unstable c/s 11831. Please apply to xen-unstable.hg. We would also want this patch to be in a 3.0.3-1 base whenever that is branched. Signed-off-by: Travis Betak <travis.betak@amd.com>

This patch supports xsave (CPUID:0x0000000D) enumeration for all sub-leaves. In specific, it fixes the following issues: 1. The sub-leaves of CPUID:0x0000000D aren''t contiguous. Hypervisor shouldn''t use register values to stop the enumeration. This patch moves checking on XSAVE sub-leaves out of if-else statement. It also bumps up sub-leaves to 63. 2. It creates a common

These two patches affect the interrupt injection logic for AMD-V (only). These patches fix issues with Windows HVM guests during boot menu screen: 1) the timer countdown is no longer very slow 2) kbd response is now no longer slow or non-existent We have also seen an occasional "dma lost interrupt"/expiry errors, and these patches seem to help with these, especially with SUSE10 HVM

delete xend entry when destroying pv usb host controller of a guest os which has no pv-frontend driver loaded. -James (Song Wei) Signed-off-by: James (Song Wei) <jsong@novell.com> diff -r f42ff98a2cdc tools/python/xen/xend/XendDomainInfo.py --- a/tools/python/xen/xend/XendDomainInfo.py Thu Mar 25 09:32:21 2010 +0000 +++ b/tools/python/xen/xend/XendDomainInfo.py Fri Mar 26 13:27:25

flight 5673 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5673/ Regressions :-( Tests which did not succeed and are blocking: test-i386-i386-xl 14 guest-localmigrate/x10 fail REGR. vs. 5640 Tests which did not succeed, but are not blocking, including regressions (tests previously passed) regarded as allowable: test-amd64-amd64-win 16

flight 5665 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5665/ Regressions :-( Tests which did not succeed and are blocking: build-amd64-oldkern 4 xen-build fail REGR. vs. 5640 build-amd64 4 xen-build fail REGR. vs. 5640 build-i386-oldkern 4 xen-build fail REGR. vs. 5640

Attached are the patches to support super page with EPT. We only support 2M size. And shadow may still work fine with 4K pages. The patches can be split into 3 parts. Apply order is as attached. tool.diff To allocate 2M physical contiguous memory in guest except the first 2M and the last 2M. The first 2M covers special memory, and Xen use the last few pages in guest memory to do special

Hi everyone! I came across a problem when I used xm create to create a domainU on my machine. I installed xen-3.0.4 on my computer, running Fedora 6, kernel version is 2.6.18-1.2798.fc. I want to install a Fedora 6 on xen, so I write the following config file, named fc6.cfg kernel = "/boot/vmlinuz-2.6.16.33-xenU" memory = 128 name = "fedora.fc6" dhcp = "dhcp" disk =

Hi, I''m running a machine with: - Hypervisor: xen-unstable - Dom0: xen/next-2.6.32.17 commit c3f5aba942c7516a5c76c47345ff0a473daf2542 Hardware: -MSI 890FXA-GD70 with AMD IOMMU -Phenom X6 I''m trying to do PCI passthrough to a HVM, this fails with: Error: Failed to assign device to IOMMU (0000:04:00.0@100,msitranslate=1,power_mgmt=0) Error: pci: to avoid potential security

Attached SVM patch fixes a virtualization of the CPUID NX bit, and cleans up other CPUID bits. Applies cleanly to xen-unstable.hg 10177. Applies to xen-3.0-testing 9696. Please apply to xen-unstable.hg. Please apply to xen-3.0-testing.hg. Tested on top of the KY patches for XCHG (HVM) and SMP SVM support. Keir, Can those 2 patches KY posted last week, also be applied to 3.0.2?

This patch worked on top of paging interface patches posted today. It create common interface for P2M table, which handles guest physical address to machine physical address translation. Tested on the following platforms: 1. AMD SVM boxes * 64-bit Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10 PAE BigSMP, and 64-bit RHEL4 * 32-bit PAE Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10

Hi Ian, There have been a lot of interest on gfx passthru recently. This patch enables ATI VBIOS in passthru mode. The guest VM system BIOS (including Windows boot logo) can now show in passthru screen. We have tested with various Windows and Linux guest VMs. Please help review it. We are also looking forward to comments and suggestions from Xen community users. Signed-off-by: Wei Huang