Displaying 20 results from an estimated 20000 matches similar to: "KeGetCurrentProcessorNumber returning 256 under windows x64"
2008 Aug 18
5
HVM windows - PCI IRQ firing on both CPU''s
I''m just doing some testing on the gplpv drivers with different ways of
handling interrupts, and I''m trying a scheme where each xen device (eg
vbd/vif) driver attaches to the same IRQ as the pci driver, and each
handles it in sequence.
In testing though, I noticed the following when logging what each ISR is
doing:
60.32381439 - evtchn event on port 5
60.32384109 - port 5
2008 Dec 26
17
Multiple IRQ''s in HVM for Windows
I really need to have the ability to tie event channel port''s to
interrupts for my gplpv drivers under Windows. Is anyone working on
anything like this? Does MSI allow more than one interrupt per PCI
device?
Thanks
James
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2007 Nov 25
4
behaviour of ''xm block-attach'' changed with 3.1.2?
''xm block-attach'' doesn''t let me assign the same backend device anymore,
even if I use ''r!'' or ''w!''.
I think this has changed since 3.1.1 (or maybe since 3.1.0).
Is this the way it is supposed to work?
Thanks
James
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Xen-devel@lists.xensource.com
2009 Aug 25
11
GPLPV drivers update
I have just uploaded a new testing version of GPL PV drivers for
Windows. Have a look for 0.10.0.97-dontuse at
http://www.meadowcourt.org/downloads (the -dontuse bit is to scare
people away who haven''t read this email :)
As usual, please test thoroughly on a test DomU and make sure you have a
backup before installing on a non-test system. In particular, I''m only
testing with Xen
2009 Aug 25
11
GPLPV drivers update
I have just uploaded a new testing version of GPL PV drivers for
Windows. Have a look for 0.10.0.97-dontuse at
http://www.meadowcourt.org/downloads (the -dontuse bit is to scare
people away who haven''t read this email :)
As usual, please test thoroughly on a test DomU and make sure you have a
backup before installing on a non-test system. In particular, I''m only
testing with Xen
2005 Sep 20
1
timer interrupts, virqs, irq balance questions
I''ve been looking into bug [1]#195 and I have a couple of questions on
how timer interrupts and virqs are handled. Is it possible for dom0
linux to irq balance timer interrupts to different cpus? That is, if
xen sends a VIRQ_TIMER to vcpu0, backed by cpu0, is it possible for that
interrupt to be handled by vcpu1, backed by cpu1 ?
After putting in some debug code in to timer_interrupt
2006 Apr 21
1
RE: [PATCH]Check the values of MAX_VIRT_CPUS and NR_CPUSfor SMP
>From: Tristan Gingold [mailto:Tristan.Gingold@bull.net]
>Sent: 2006年4月21日 15:26
>> >
>> >See how we solve this on x86 near the top of do_boot_cpu() in
>> >arch/x86/smpboot.c. Essentially we allocate extra idle domains on
>> >demand to give us enough idle vcpus for one per physical cpu.
>> >
>> > -- Keir
>>
>> Yes,
2006 Apr 21
0
RE: [PATCH]Check the values of MAX_VIRT_CPUS and NR_CPUSfor SMP
>From: Tristan Gingold [mailto:Tristan.Gingold@bull.net]
>Sent: 2006年4月21日 15:40
>
>Le Vendredi 21 Avril 2006 09:28, Tian, Kevin a écrit :
>> From: Tristan Gingold [mailto:Tristan.Gingold@bull.net]
>>
>> >Sent: 2006年4月21日 15:26
>> >
>> >> >See how we solve this on x86 near the top of do_boot_cpu() in
>> >> >arch/x86/smpboot.c.
2013 Jan 11
3
looking for R packages that can do the following:
1. Minimum Mean Square Estimation (for Multi-Dimensional Linear Regression)
2. Two-Sample Kolmogorov-Smirnov Tests
3. Empirical ANOVA Methods
All this to be done on empirical data.
I am new to the R world, any help would be appreciated.
Thank You,
Bill Gilliland
Lead Sensor Systems Engineer
E303, Tactical Communications, Transport, and Sensors
Group: Tactical
2009 Feb 25
3
Xen 3.3.1 + Windows 2008 x64 + GPLPV 0.9.12-pre13 = corruption?
Hi James,
I''m testing GPLPV 0.9.12-pre13 on Windows 2008 x64, and found some
interesting results :
- The drivers are NOT signed, even though I''ve install certs. Had to
use F8 on boot.
- both QEMU and Xen block device are active, which usually means
corruption is coming. Is this a known issue?
http://i44.tinypic.com/2vmypvk.png
http://i42.tinypic.com/2mewnia.png
Regards,
Fajar
2008 Nov 11
0
RE: Xen-users Digest, Vol 45, Issue 45
Kathy,
Thank you very much!
Peter Olson
Alcatel-Lucent
Member of Technical Staff
Services Technologies
1960 Lucent Lane
Rm 7G334
Naperville, IL 60566
peterolson@alcatel-lucent.com
Phone: 630 979 0573
Mobile: 630 430 6926
-----Original Message-----
From: xen-users-bounces@lists.xensource.com
[mailto:xen-users-bounces@lists.xensource.com] On Behalf Of
xen-users-request@lists.xensource.com
Sent:
2008 Jun 19
0
[PATCH] ia64/xen: introduce definitions necessary for ia64/xen hypercalls.
import include/asm-ia64/xen/interface.h to introduce introduce
definitions necessary for ia64/xen hypercalls.
They are basic structures to communicate with xen hypervisor and
will be used later.
Cc: Robin Holt <holt at sgi.com>
Cc: Jeremy Fitzhardinge <jeremy at goop.org>
Signed-off-by: Isaku Yamahata <yamahata at valinux.co.jp>
Cc: "Luck, Tony" <tony.luck at
2008 Jun 19
0
[PATCH] ia64/xen: introduce definitions necessary for ia64/xen hypercalls.
import include/asm-ia64/xen/interface.h to introduce introduce
definitions necessary for ia64/xen hypercalls.
They are basic structures to communicate with xen hypervisor and
will be used later.
Cc: Robin Holt <holt at sgi.com>
Cc: Jeremy Fitzhardinge <jeremy at goop.org>
Signed-off-by: Isaku Yamahata <yamahata at valinux.co.jp>
Cc: "Luck, Tony" <tony.luck at
2011 Dec 12
0
[PATCH 1/4] ACPI: eliminate duplicate MADT parsing and unused SBF definitions
Use their proper counterparts in include/acpi/actbl*.h instead.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/ia64/xen/dom_fw_common.c
+++ b/xen/arch/ia64/xen/dom_fw_common.c
@@ -347,7 +347,7 @@ struct fake_acpi_tables {
struct acpi_table_header dsdt;
uint8_t aml[8 + 11 * MAX_VIRT_CPUS];
struct acpi_table_madt madt;
- struct acpi_table_lsapic lsapic[MAX_VIRT_CPUS];
+
2009 Jan 12
1
AW: Clocksources and other mysteries
It''s everytime when cpufreq_ondemand or cpufreq-set changes the frequency, aprox. 3 messages per event.
Is that occasional? I tend to say: no. Please see an excerpt below. And if it''s not occasional, what
could I do? And by the way: I found no code that TSC will get adjusted, so I think it will get worse
over the time...
Thanks, Carsten.
messages.0:Jan 9 12:25:15 data kernel:
2010 Jan 30
20
"Iomem mapping not permitted" during windows crash dump under GPLPV
I''ve recently noticed that my windows crash dumps fail at around 40-50%
under GPLPV. ''xm dmesg'' shows the following:
(XEN) grant_table.c:350:d0 Iomem mapping not permitted ffffffffffffffff
(domain 865)
At first I thought that the cause was just a bug in my grant ref code
but it just occurred to me that this could be happening when Windows
tries to write out the
2009 Jun 22
12
GPLPV 0.10.0.69 Blue Screen 0x0000007B
Trying to install them on Xen 3.4.0, Intel E5345 Processors, Server 2008
64bit. I get the BSoD on boot with the 0x0000007B stop message. I''ve
got a bunch of 2003 32bits running on the same host with the 0.10.0.69
drivers and those are totally happy. I tried the boot once with NOGPLPV
idea mentioned in another thread, that didn''t do the trick.
Ideas anyone?
pace
2009 Sep 07
4
Poor network performance on Win2k3 DomU
Hi everyone.
I´m having this problem with Red Hat 5.4 running on a HP ProLiant BL460c G6.
I have two windows 2k3 x64, but network performance is extremely bad without
PV drivers, i mean, it takes a lot of time to access any location and if the
path has many folders it can´t conect.
Redhat provides some PV dirvers. I´ve installed them, but with no
improvements.
I tested another DomU, with the
2010 May 05
0
hibernation test result of windows srv2008 R2 x64 hvm and winpv guest
Hi
I run some hibernation tests on windows HVM and HVM with windows pv
driver. The test case is common scenario test(one test case of WHQL
test), this test case will hibernate the vm for many times, and doing
some IO operations for devices. The windows guest is Srv2008 R2 x64.
Following is my test result
HVM guest with pv driver,
machines 1cpu and 2cpu
4cpu
AMD pass pass
Intel pass
2009 Aug 25
0
[LLVMdev] ISRs for PIC16 [was [llvm]r79631 ...]
Hi Ali,
Thanks for bringing this up. You're definitely under very tight design
constraints from the hardware. I can certainly sympathize.
I think two design elements are being conflated here, and it would be
worthwhile splitting them out. For correctness, you need to make sure
any routines called from an ISR don't clobber equivalent routines
called from mainline code. For