similar to: [PATCH 2/2] ACPI: Grant access of MSR_IA32_THERM_CONTROL MSR to dom0

Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen Signed-off-by: Wei Gang <gang.wei@intel.com> diff -r bd683e0397b4 xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Tue Feb 17 22:29:38 2009 +0800 +++ b/xen/arch/x86/traps.c Wed Feb 25 11:23:01 2009 +0800 @@ -2187,10 +2187,17 @@ static int emulate_privileged_op(struct case MSR_IA32_MPERF: case MSR_IA32_APERF:

Enable Px/Cx related CPUID/MSR bits for dom0 to get correct Px/Cx info. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: H. Peter Anvin <hpa@zytor.com> diff -urN --exclude='o.*' --exclude '*~'

This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: H. Peter Anvin <hpa@zytor.com> diff -urN --exclude='o.*' --exclude '*~'

This patch clarifies a vague statement in the SDM: the recommended maximum number of MSRs that can be automically switched by CPU during VMExit and VMEntry is 512, rather than 512 Bytes of MSRs. Depending on the CPU implementations, it may also support more than 512 MSRs to be auto switched. This can be calculated by (MSR_IA32_VMX_MISC[27:25] + 1) * 512. Signed-off-by: Wei Wang <wei.w.wang at

This is a bug fixing. So it needs go into 4.1. x86: add volatile prefix for cpuid asm clauses cpuid results are possible to be changed now. For example, changing CR4.OSXSAVE bit or setting MSR XCR_XFEATURE_ENABLED_MASK may change XSAVE related cpuid leave return values. The volatile prefix is required to avoid the second cpuid calls following some possible changing operations being optimized in

On 09/25/2017 07:54 PM, Paolo Bonzini wrote: > On 25/09/2017 06:44, Wei Wang wrote: >> >> +static void update_msr_autoload_count_max(void) >> +{ >> + u64 vmx_msr; >> + int n; >> + >> + /* >> + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is >> + * n, then (n + 1) * 512 is the recommended max number of MSRs to be

On 25/09/2017 06:44, Wei Wang wrote: > > +static void update_msr_autoload_count_max(void) > +{ > + u64 vmx_msr; > + int n; > + > + /* > + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is > + * n, then (n + 1) * 512 is the recommended max number of MSRs to be > + * included in the VMExit and VMEntry MSR auto switch list. > + */ > +

On 25/09/2017 06:44, Wei Wang wrote: > > +static void update_msr_autoload_count_max(void) > +{ > + u64 vmx_msr; > + int n; > + > + /* > + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is > + * n, then (n + 1) * 512 is the recommended max number of MSRs to be > + * included in the VMExit and VMEntry MSR auto switch list. > + */ > +

Isolate Xen PM related code in dom0 with #ifdef CONFIG_XEN to avoid breaking native. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

[PATCH] Clean up x86 control register and MSR macros This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: H. Peter Anvin <hpa@zytor.com> diff -urN

[PATCH] Clean up x86 control register and MSR macros This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: H. Peter Anvin <hpa@zytor.com> diff -urN

Change from v2: re-written code in ''vmx_intr_assist'' into if()/else if() sequence to make code change easy to review. Virtual interrupt delivery avoids Xen to inject vAPIC interrupts manually, which is fully taken care of by the hardware. This needs some special awareness into existing interrupr injection path: For pending interrupt from vLAPIC, instead of direct injection, we

flight 10626 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/10626/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-i386-xl-multivcpu 16 guest-start.2 fail in 10623 REGR. vs. 10621 Tests which are failing intermittently (not blocking): test-amd64-i386-rhel6hvm-intel 4 xen-install fail

Wei Liu <wei.liu at kernel.org> writes: > Signed-off-by: Wei Liu <wei.liu at kernel.org> > --- > drivers/clocksource/hyperv_timer.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c > index 09aa44cb8a91..fe96082ce85e 100644 > --- a/drivers/clocksource/hyperv_timer.c > +++

flight 6714 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/6714/ Regressions :-( Tests which did not succeed and are blocking: build-amd64-oldkern 4 xen-build fail REGR. vs. 6658 build-amd64 4 xen-build fail REGR. vs. 6658 build-i386-oldkern 4 xen-build fail REGR. vs. 6658

This morning, I upgraded my main system to an up-to-date -STABLE including acpi and it now hangs during shutdown after reporting: Waiting (max 60 seconds) for system process `vnlru' to stop...stopped If I set hw.acpi.disable_on_poweroff=0 then the shutdown completes but poweroff fails with (hand copied): ACPI-1287: ***Error: Method execution failed [\_PTS] (Node 0xc21ed450),

flight 6412 xen-4.1-testing real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/6412/ Regressions :-( Tests which did not succeed and are blocking: test-amd64-xcpkern-i386-xl-credit2 11 guest-localmigrate fail REGR. vs. 6379 Tests which did not succeed, but are not blocking, including regressions (tests previously passed) regarded as allowable: test-amd64-amd64-win 16

> -----Original Message----- > From: virtualization-bounces at lists.linux-foundation.org > [mailto:virtualization-bounces at lists.linux-foundation.org] On Behalf Of Andy > Lutomirski > Sent: Wednesday, September 17, 2014 7:51 PM > To: Linux Virtualization; kvm list > Cc: Gleb Natapov; Paolo Bonzini; Theodore Ts'o; H. Peter Anvin > Subject: Standardizing an MSR or

> -----Original Message----- > From: virtualization-bounces at lists.linux-foundation.org > [mailto:virtualization-bounces at lists.linux-foundation.org] On Behalf Of Andy > Lutomirski > Sent: Wednesday, September 17, 2014 7:51 PM > To: Linux Virtualization; kvm list > Cc: Gleb Natapov; Paolo Bonzini; Theodore Ts'o; H. Peter Anvin > Subject: Standardizing an MSR or