similar to: [PATCH] vtd: fix Dom0 S3 when VT-d is enabled.

Displaying 20 results from an estimated 500 matches similar to: "[PATCH] vtd: fix Dom0 S3 when VT-d is enabled."

2011 Jan 10
3
[PATCH] libxl: implement trigger s3resume
Implement trigger s3resume This is the equivalent of xm trigger s3resume and it is implemented the same way: using an ACPI state change. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> diff -r 1ae74f060a39 tools/libxl/libxl.c --- a/tools/libxl/libxl.c Mon Jan 10 10:37:53 2011 +0000 +++ b/tools/libxl/libxl.c Mon Jan 10 10:58:50 2011 +0000 @@ -2668,8 +2668,14 @@ static
2007 Nov 29
1
VMX status report. Xen: #16481 & Dom0: #323
Hi all, This is today''s xen nightly test report, changeset: 16481 unstable tree.  Linux-xen:323 No new issue today. But I include full validation failure in this list.    Old issues : ================================================= 1) Can not install 32bit Fedora 7 with vcpu > 1 http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1084 2) [Installation] Fedora8 IA32e guest
2008 Oct 09
1
[PATCH] vtd: Define a struct IO_xAPIC_route_entry to accommodate both ioapic and iosapic
The patch makes some pci access functions architecture independent. It only moves the 2 functions from xen/arch/x86/pci.c to xen/drivers/pci/pci.c. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2008 Mar 07
0
VTD-XML 2.3 released
Version 2.3 of VTD-XML (http://vtd-xml.sf.net), the next generation document-centric XML processing model, is now released. To download the latest version please visit http://sourceforge.net/project/showfiles.php?group_id=110612&package_.... Below is a list of new features and enhancements in this version. * VTDException is now introduced as the root class for all other VTD- XML''s
2009 Feb 10
0
[PATCH] vtd: fix compilation error on ia64 for 19185:1eb6afcad849.
Hi, The staging tree 19185:1eb6afcad849 cannot be compiled on ia64: vtd.c: In function `alloc_pgtable_maddr'': vtd.c:60: error: too few arguments to function `iommu_flush_cache_page'' The attached patch fixes it. Signed-off-by: KUWAMURA Shin''ya <kuwa@jp.fujitsu.com> Best regards, -- KUWAMURA Shin''ya
2007 Sep 30
6
[VTD][PATCH] a time out mechanism for the shared interrupt issue for vtd
Attached is a patch for shared interrupt between dom0 and HVM domain for vtd. Most of problem is caused by that we should inject interrupt to both domains and the physical interrupt deassertion then may be delayed by the device assigned to the HVM. The patch adds a timer, and the time out value is sufficient large to tolerant the delaying used to wait for the physical interrupt deassertion.
2011 Jan 28
3
[PATCH][VTD][GFX] pass gfx_passthru parameter to QEMU
Pass gfx_passthru parameter to QEMU. Keep it boolean for now as QEMU does not expect any other integer value. Signed-off-by: Allen Kay <allen.m.kay@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2008 Sep 26
1
[PATCH] [VTD] Add a check for interrupt remapping of ioapic RTE
For IOAPIC interrupt remapping, it only needs to remap ioapci RTE, should not remap other IOAPIC registers, which are IOAPIC ID, VERSION and Arbitration ID. This patch adds the check for this and only remap ioapci RTE. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing
2007 Nov 24
0
[VTD][PATCH] Some fixes of Intel iommu
This patch removes a wrong if condition judgement to setup rmrr identify mapping for guests, and passes page count rather than address size to iommu_flush_iotlb_psi(). Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Anthony Xu <Anthony.xu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com
2008 Jul 23
0
[PATCH] [VTD] Add RMRR check in DMAR parsing
During parsing DMAR table, if find RMRR is incorrect, return error. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Dec 25
1
[VTD][PATCH] Fix addr_to_dma_page() and rmrr mapping issues
Fix addr_to_dma_page() issue to return l1e correctly, and also clean up rmrr mapping code, make sure setup rmrr identify mapping just once per domain. This patch fixes the VT-d bug (Fail to boot smp Linux guest with VT-d NIC assigned on IA32e platform). Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list
2007 Oct 29
0
[VTD][PATCH] Move out isa irq mapping from hvm_do_IRQ_dpci()
Setting isa irq mapping in hvm_do_IRQ_dpci() costs time when each interrupt occurs, and it doesn''t update isa irq mapping when pci_link is updated. This patch fixes this issue. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2008 Oct 15
0
[PATCH] [VTD] Fix MSI-x interrupt remapping
MSI-x may have multiple vectors, however in current interrupt remapping code, one device only has one entry in interrupt remapping table. This patch adds ''remap_index'' in msi_desc structure to track its index in interrupt remapping table. Signed-off-by: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>
2008 Sep 08
1
[PATCH] [VTD] Enable pass-through translation for Dom0
If pass-through field in extended capability register is set, set pass-through translation type for Dom0, that means DMA requests with Untranslated addresses are processed as pass-through in Dom0, needn''t translate DMA requests through a multi-level page-table. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>
2008 Jun 27
0
[PATCH][VTD] Minor fixing of interrupt remapping
When ir_ctrl->iremap_index == -1, it means there is no remap entry. So it needn''t to convert from remap format to normal ioapic format. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Oct 09
0
[VTD][PATCH] iommu code cleanup
This patch cleans up iommu code. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Nov 07
0
[PATCH]vtd, one more fix about PMR disable
One more fix about PMR disable. Move PMR disable into per-iommu enable function, instead of in current iommu_setup which only takes effect on first VT-d engine. This change also enlightens S3 resume path. Signed-off-by Gang Wei (Jimmy) <gang.wei@intel.com> Signed-off-by Kevin Tian <kevin.tian@intel.com> Thanks, Kevin _______________________________________________ Xen-devel
2008 Nov 20
0
[PATCH 2/2][VTD] ats support for Intel64 with VT-d
This patch turns on ATS in VT-d context entries and devices with ATS capability. It also contain minor code clean up. Signed-off-by: Allen Kay <allen.m.kay@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2011 Sep 09
1
Intel-VTd problem
Hello to you guys, yeah Im also one of the people who seem to have a corrupted BIOS. I read already stuff about the issue''s with certain vendors - and I guess in one particular area it was made clear that even you cant do a lot about it you still collect details. CPU Intel Core i7 X980 Mainboard Asus P6T WS Professional (X58/LGA1333)(bios 1207) rev. 1.01G I also have two other
2008 Dec 08
4
[PATCH][VTD] pci mmcfg patch for x86-64 - version 2
Fixes made in version 2: 1) Use PML4[257] for ioremap of PCI mmcfg. As full 16-bit segment support would require 44-bits. Since each slot only has 39-bits, we support 2048 PCI segments for now. This can be easily expanded if deemed necessary in the future. 2) Integrated PCI mmcfg access with existing PCI config interface for x86_64. Use MMCFG interface if offset is greater than 256.