similar to: [PATCH][SVM] CPUID cleanup

This patch worked on top of paging interface patches posted today. It create common interface for P2M table, which handles guest physical address to machine physical address translation. Tested on the following platforms: 1. AMD SVM boxes * 64-bit Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10 PAE BigSMP, and 64-bit RHEL4 * 32-bit PAE Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10

These two patches affect the interrupt injection logic for AMD-V (only). These patches fix issues with Windows HVM guests during boot menu screen: 1) the timer countdown is no longer very slow 2) kbd response is now no longer slow or non-existent We have also seen an occasional "dma lost interrupt"/expiry errors, and these patches seem to help with these, especially with SUSE10 HVM

Patch 2/2 - Add flag to indicate that an exception event needs injecting, and to delay the ext interrupt injection. Remove unnecessary check of RFLAGS.IF for ExtInt injection. Applies cleanly to xen-unstable c/s 11831. Please apply to xen-unstable.hg. We would also want this patch to be in a 3.0.3-1 base whenever that is branched. Signed-off-by: Travis Betak <travis.betak@amd.com>

Remove visibility of the FFXSR CPUID bit to an HVM guest. This patch allows HVM Windows x64 to install/boot on AMD-V platforms. This patches applies cleanly to xen-unstable 13743. Please apply to xen-unstable/3.0.5. If possible, pls apply to xen-3.0.4-testing. --Tom thomas.woller@amd.com AMD Corporation 5204 E. Ben White Blvd. UBC1 Austin, Texas 78741 +1-512-602-0059

SVM patch to cleanup IOIO handling, do not use "real" mode but rather the correct "bitness". Applies cleanly to 10002. Please apply to xen-unstable.hg. Please apply to xen-3.0-testing.hg. Signed-off-by: Tom Woller <thomas.woller@amd.com> Signed-off-by: Mats Petersson <mats.petersson@amd.com> _______________________________________________ Xen-devel mailing list

Attached patch for svm will enable a tlb flush for each vmrun. Applies cleanly to 8781:dcc2beb8a1d2 Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

SVM patch to add 64bit hv support. This patch only modifies svm files. Tested with c/s 9015 with 32bit hv using UP Dom0, with UP linux and winxpsp1 unmodified guests. Tested with c/s 9015 with 64bit hv using UP Dom0, with 32bit and 64bit UP linux and 32bit winxpsp1. Applies cleanly to 9016. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com>

Svm patch to add 32bit msr support (combined both 32bit with 64bit functions) and enable vlapic for 64bit. Applies cleanly to 9023. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

SVM patch to add a host save area per core for the hypervisor and also for the microcode. The microcode area is not guaranteed to be compatible with the vmcb layout, therefore will require it''s own "scratch pad". Consolidate the per core areas into a single structure. Applies cleanly to 10002. Please apply to xen-unstable.hg. Please apply to xen-3.0-testing.hg.

Correct compile time compare of CONFIG_PAGING_LEVELS for 64bit and 32bit PAE guests. This code affects accesses to the CR4 register by the SVM guest. Applies cleanly to 10729 + posted NMI/STGI SVM patch. Please apply to xen-unstable.hg. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

SVM patch to add add init intercept handler. Applies cleanly to 9622. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

AMD-V does not require the delaying of interrupt injection if the guest IF_FLAG disallows interrupts. Remove the code in svm_intr_assist() that was checking the guest IF in eflags. This patch fixes the problem with HVM Windows guests, with observing a very slow timer countdown on the initial boot menu, when there is more than one boot option. Kbd response in this same Windows boot menu is also

SVM patch to update guest time with latest hvm modifications. Applies cleanly to 9457. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

SVM patch to fix guest time, including 64bit msr code - allowing 64bit linux guests to enable APIC (ie. apic=1 now works in guest config file). Applies cleanly to 9383 changeset. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This adds SUSE and openSUSE capabilities to the virt-v2v.db. It also adds a SUSE custom package example, and br0 -> default network map example. --- v2v/virt-v2v.conf | 8 ++++++ v2v/virt-v2v.db | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/v2v/virt-v2v.conf b/v2v/virt-v2v.conf index fadce17..6574c0a 100644 ---

This patch enables LWP related CPUID to HVM guests. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

VMCB physical address is useful for hardware debug. This small patch dumps VMCB physical address. Signed-off-by: Wei Huang <wei.huang2@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values

Hi there, I ran a test on an Apache server, the workload is a helloworld.c compiled cgi, very simple. OS is SLES 10. The stress tool is ab (apache bench). The performance looks big degration from native to Dom0: Running in prefork mode: Native Dom0 Performance(request/s) 3700 . 650 CPU%

Hi there, I ran a test on an Apache server, the workload is a helloworld.c compiled cgi, very simple. OS is SLES 10. The stress tool is ab (apache bench). The performance looks big degration from native to Dom0: Running in prefork mode: Native Dom0 Performance(request/s) 3700 . 650 CPU%