Displaying 20 results from an estimated 20000 matches similar to: "[PATCH] patch to buffer write ioreq"
2007 Jun 20
9
[Patch] Add NMI Injection and Pending Support in VMX
Currently, Xen does not support injecting an NMI to HVM guest OS. Adding
this
feature is necessary for those softwares which depend on NMI to function
correctly,
such as KDB and oprofile.
The attached patch allows NMI to be injected to guest OS in NMIP capable
platforms.
It also enables to queue an NMI and then inject it as soon as possible.
Signed-off-by: Haitao Shan
2006 Jun 23
5
[PATCH] [HVM] Fix virtual apic irq distribution
Fix virtual apic irq distribution.
But currently we inject PIT irqs to cpu0 only. Also mute some warning
messages.
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2008 Jul 11
10
Will Xen support PCI add-on card for serial ports?
hi,
It looks that Xen currently only support ISA serial port, which is onboard.
Is there any plan to support the PCI serial port?
Thanks,
Neo
--
I would remember that if researchers were not ambitious
probably today we haven''t the technology we are using!
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2006 Oct 12
9
[PATCH] an obvious fix to PIC IO intercept
an obvious fix to PIC IO intercept.
In PIC IO, address from send_pio_req is physical address already.
Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2005 Dec 17
6
i915drm
HI all,
I am running FreeBSD 6.0-STABLE (of today) on a HP Pavillon (centrino based
notebook with i915 graphic chipset).
I am trying to use the latest drm hook for i915, but I get this error:
drmsub0: <Intel i915GM> port 0x1800-0x1807 mem
0xb0080000-0xb00fffff,0xc0000000-0xcfffffff,0xb0000000-0xb003ffff irq 16 at
device 2.0 on pci0
error: [drm:pid0:drm_load] *ERROR* Card isn't AGP, or
2008 May 09
14
[PATCH] patch to support super page (2M) with EPT
Attached are the patches to support super page with EPT. We only support
2M size. And shadow may still work fine with 4K pages.
The patches can be split into 3 parts. Apply order is as attached.
tool.diff
To allocate 2M physical contiguous memory in guest except the first 2M
and the last 2M.
The first 2M covers special memory, and Xen use the last few pages in
guest memory to do special
2007 Oct 17
7
[VTD][RESEND]add a timer for the shared interrupt issue for vt-d
Keir,
It''s a resending patch for the timeout mechanism to deal with the shared
interrupt issue for vt-d enabled hvm guest.
We modify the patch following your comments last time and make some
other small fix:
1) We don''t touch the locking around the hvm_dpci_eoi().
2) Remove the HZ from the TIME_OUT_PERIOD macro which may confuse
others.
3) Add some
2009 Jan 22
8
[PATCH 2/2] Enhance MTRR/PAT virtualization for EPT & VT-d enabled both
The patch attached is to set effective memory type for EPT according to the VT-d snoop control capability, and also includes some cleansup for EPT & VT-d both enabled.
Signed-off-by: Zhai, Edwin Edwin.Zhai@intel.com<mailto:Edwin.Zhai@intel.com>
Signed-off-by: Xin, Xiaohui xiaohui.xin@intel.com<mailto:xiaohui.xin@intel.com>
_______________________________________________
2007 Sep 30
6
[VTD][PATCH] a time out mechanism for the shared interrupt issue for vtd
Attached is a patch for shared interrupt between dom0 and HVM domain for
vtd.
Most of problem is caused by that we should inject interrupt to both
domains and the
physical interrupt deassertion then may be delayed by the device
assigned to the HVM.
The patch adds a timer, and the time out value is sufficient large to
tolerant
the delaying used to wait for the physical interrupt deassertion.
2006 Oct 24
2
double invoke of hvm_do_resume
Keir:
Not sure from when, at least now hvm_do_resume is double invoked
in both 1: arch_vmx_do_resume from schedule_tail, and 2)
vmx_asm_do_vmentry of ASM code for both x86 32 & 64 bits. I am wondering
if the #1 is a redundant, can u have a double check?
thx,eddie
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2011 Feb 18
2
Re: Xen-devel Digest, Vol 71, Issue 85
Hi all!
Did the nested xen stuff make it into the xen-unstable (4.1-rc1?) tree as
suggested back in January by Tim Deegan?
TIA
________________________________
Date: Fri, 7 Jan 2011 16:01:12 +0000
From: Tim Deegan <Tim.Deegan@citrix.com>
Subject: Re: [Xen-devel] [PATCH 00/12] Nested Virtualization: Overview
To: Christoph Egger <Christoph.Egger@amd.com>
Cc: Keir Fraser
2006 Nov 29
25
EFER in HVM guests
Is it intentional that
- under SVM, 32-bit guests can freely set EFER.LME
- under VMX, 32-bit guests can''t access EFER at all?
Thanks, Jan
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2009 Jan 22
17
Critical bug: VT-d fault causes disk corruption or Dom0 kernel panic.
All,
We met several system failures on different hardware platforms, which are all caused by VT-d fault.
err 1: disk is corrupted by VT-d fault on SATA.
err 2: Dom0 kernel panics at booting, which is caused VT-d fault on UHCI.
err 3, Dom0 complains disk errors while creating HVM guests.
The culprit would be changeset 19054 "x86_64: Remove statically-partitioned Xen heap.".
Detailed
2007 Apr 16
11
vmx status report against changeset 14854 - 1 block issue
We meet a block issue in today''s nightly testing. Xen0 hang when we destroy a XenU guest.
Block issue
1) xen0 hang when destroying a XenU guest
http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=963
Thanks
Yunfeng
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2007 Jul 10
5
[PATCH] vmwrite high 32 bits of 64bit VMCS fields when in PAE mode
vmwrite higher 32 bits of 64bit VMCS fields when in PAE mode.
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2012 Nov 22
41
[PATCH V3] vmx/nmi: Do not use self_nmi() in VMEXIT handler
The self_nmi() code cause''s an NMI to be triggered by sending an APIC
message to the local processor. However, NMIs are blocked by the
VMEXIT, until the next iret or VMENTER.
Volume 3 Chapter 27 Section 1 of the Intel SDM states:
An NMI causes subsequent NMIs to be blocked, but only after the VM exit
completes.
As a result, as soon as the VMENTER happens, an immediate VMEXIT
happens
2007 Mar 28
7
[PATCH] Proper use of VMX execution controls MSR.
Better use of VMX execution controls MSR.
Signed-off-by: Xin Li<xin.b.li@intel.com>
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2011 May 30
6
[PATCH] CPUID level 0x00000007:0 (ebx) is word 9, instead of word 7
CPUID level 0x00000007:0 (ebx) is word 9, instead of word 7.
... make it consistent with native Linux.
Signed-off-by: Li Xin <xin.li@intel.com>
diff -r d7c755c25bb9 xen/include/asm-x86/cpufeature.h
--- a/xen/include/asm-x86/cpufeature.h Sat May 28 08:58:08 2011 +0100
+++ b/xen/include/asm-x86/cpufeature.h Tue May 31 07:34:34 2011 +0800
@@ -142,7 +142,7 @@
#define X86_FEATURE_TOPOEXT
2005 Nov 11
3
[PATCH] add MOVSX instr support to VMX MMIO decoder
Add MOVSX instr support to VMX MMIO decoder.
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2007 Jan 26
12
[Patch] the interface of invalidating qemu mapcache
HVM balloon driver or something, that''s under development, may decrease
or increase the machine memory that is taken by HVM guest; in IA32/IA32e
host, now Qemu maps the physical memory of HVM guest based on little
blocks of memory (the block size is 64K in IA32 host or 1M in IA32E
host). When HVM balloon driver decreases the reserved machine memory of
HVM guest, Qemu should unmap the