Displaying 20 results from an estimated 4000 matches similar to: "FLAC DLL available?"
2007 Apr 30
1
FLAC: win installer
Hi,
what does the 'a' means in the win installer:
http://internap.dl.sourceforge.net/sourceforge/flac/flac-1.1.4a.exe ?
Is this to indicate alpha version or ...?
I was not sure. And does the installer uses the same flac tools as in this
zip file:
http://sourceforge.net/project/showfiles.php?group_id=13478&package_id=12675?
thanks in advance!
-------------- next part --------------
2011 Aug 23
2
Can't install program with today's git in 64-bit
<head><style>body{font-family: Geneva,Arial,Helvetica,sans-serif;font-size:9pt;background-color: #ffffff;color: black;}</style></head><body id="compText">>I downloaded today''s git, compiled --enable-win64, and installed. <br>>The command "wine64 notepad" produces notepad, and everything seems fine. <br>>But then I
2012 Nov 16
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
Jakob pointed out to me that the Gcra.cpp allocator doesn't record
basic-block live-ins, which are used by the verifier to check correctness.
You can record which variables are live into a basic block with
MachineBasicBlock::addLiveIn(unsigned physReg). I don't know the verifier
well, but if it's using other built in infrastructure for register
allocation then it may not be
2016 Apr 20
0
Data reshaping with conditions
Hi sri,
As your problem involves a few logical steps, I found it easier to
approach it in a stepwise way. Perhaps there are more elegant ways to
accomplish this.
svdat<-read.table(text="Count id name type
117 335 sally A
19 335 sally A
167 335 sally B
18 340 susan A
56 340 susan A
22 340 susan B
53 340 susan B
135 351 lee A
114 351 lee A
84 351 lee A
80 351 lee A
19 351 lee A
8 351 lee A
2015 May 07
2
[LLVMdev] llvm cross compilation and simplescalar simulation for ARM
Hi,
I want to explorer affection of compiler on low power.
For the project background, I tend to process this work via LLVM, rather than GCC. And the Target is ARM.
For this purpose, clang(3.2) + arm-gcc + simplescalar-arm(and panalyzer) seems to be a good choice. But I encounter several problems in the processing of setup the environment.
----------------------------------
1. Firstly, arm
2016 Apr 21
2
Data reshaping with conditions
Hi Jim,
Thanks for your time. But somehow this code did not help me to achieve my
expected output.
Problems: 1) x, y are coming as logical rather than values as I mentioned
in my post
2) The values that I get for Max A and Max B not correct
3) It looks like a pretty big data, but I just need to
concatenate the values with a comma, the final output will be a character
2006 Aug 11
2
Getting ViaVoice 10 Pro USB to install
susan@susan:~/.wine/dosdevices/e:$ wine setup.exe
susan@susan:~/.wine/dosdevices/e:$ fixme:seh:check_no_exec No-exec fault triggered at 0x1a082000, enabling work-around
err:ntdll:RtlpWaitForCriticalSection section 0xa5125590 "?" wait timed out in thread 0012, blocked by 0000, retrying (60 sec)
susan@susan:~/.wine/dosdevices/e:$ err:ntdll:RtlpWaitForCriticalSection section 0xa5125590
2012 Nov 13
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Lang -
Your fix does prevent the assembler errors, but it doesn't seem to
produce correct assembly.
I created a slightly modified version that, for each instruction that
includes a vreg, adds a check that the preg selected is not already in
that instruction. I've attached that version.
I think that this version of Gcra.cpp should produce correct assembler,
since it's allocating
2012 Nov 13
5
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
The problem is that the allocator is re-using the 'preg', which is
calculated for an operand that may have a subreg index, for loads and
stores to a stack-slot. The stack slot always has the same width as vreg
(which is the right behavior), but for operands with subreg indexes,
'preg''s class will be different from 'vreg', in which case you get the
mismatched
2012 Nov 07
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
Sorry for the delayed response. Thanks for the test cases - I'm looking in
to this now.
- Lang.
On Mon, Nov 5, 2012 at 2:58 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote:
> Hi Lang,
>
> I looked more into one of the problems I'm now having, and I've attached 3
> files:
>
> Gcra.cpp is like your version except that for two specific vregs it uses
2016 Apr 20
2
Data reshaping with conditions
Dear All,
I am trying to reshape the data with some conditions. A small part of the
data looks like below. Like this there will be more data with repeating ID.
Count id name type
117 335 sally A
19 335 sally A
167 335 sally B
18 340 susan A
56 340 susan A
22 340 susan B
53 340 susan B
135 351 lee A
114 351 lee A
84 351 lee A
80 351 lee A
19 351 lee A
8 351 lee A
21 351 lee A
88 351 lee B
111 351
2012 Nov 11
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
It looks like the bitcode you have attached is corrupted. You should make
sure to attach it as a binary file. Alternatively you can attach the LLVM
assembly as text. You can generate an assembly file from bitcode with:
llvm-dis -o <asm file> <bitcode>
Regards,
Lang.
On Fri, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu> wrote:
> Thanks Lang,
2012 Nov 14
1
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
The problem now is the usedPregSet. Take the instruction:
%vreg13:sub_32bit<def> = ADD32rr %vreg13:sub_32bit, %EAX<kill>,
%EFLAGS<imp-def,dead>
%EAX will be added to usedPregSet when the instruction is encountered, but
%vreg13 is a different class (64bit registers), so none of its candidates
will conflict. In addition to checking membership of usedPregSet, you need
2012 Nov 11
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Sorry about that. I created the assembly file and attached it (as
math.txt).
Susan
On 11/11/2012 12:41 AM, Lang Hames wrote:
> Hi Susan,
>
> It looks like the bitcode you have attached is corrupted. You should
> make sure to attach it as a binary file. Alternatively you can attach
> the LLVM assembly as text. You can generate an assembly file from
> bitcode with:
>
>
2012 Nov 15
5
[LLVMdev] problem trying to write an LLVM register-allocation pass
I tried using this flag and it gave me errors on code that otherwise
assembles and runs just fine (using the version of Gcra.cpp that Lang
wrote). So I'm wondering if I should really be using the flag? I'm
using it like this:
llc -verify-machineinstrs -load Debug/lib/P4.so -regalloc=gc xxx.bc
Susan
On 11/15/2012 01:13 PM, Jakob Stoklund Olesen wrote:
>
> On Nov 15, 2012, at
2012 Nov 05
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
With your bitcode file I am now able to reproduce the issue you're seeing.
It looks like this is a problem with the naive rewriting from virtregs to
physregs. It appears that the subreg field of physreg operands is ignored
post-register allocation. In your testcase %vreg11:sub32 is being rewritten
to RBX:sub32, but the :sub32 part is being quietly dropped when the
assembly is
2012 Nov 05
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Lang,
I looked more into one of the problems I'm now having, and I've attached
3 files:
Gcra.cpp is like your version except that for two specific vregs it uses
hard-coded pregs instead of the first in the corresponding class.
bug1.c is an input that causes the failed assertion for me. If I use
the non-debug version of LLVM-3.1 I instead get assembler errors like this:
Error:
2012 Nov 04
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
I tested the version of Gcra.cpp that I sent you on x86-64 systems running
MacOS 10.8 and Ubuntu 12.04 (Linux 3.2.0).
Could you send me the bitcode file you're compiling? Different bitcodes
(due to different clang versions or applied optimizations) could account
for the different results we're seeing. For reference I've attached the
*.ll file that I have tested with, which
2012 Nov 09
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Thanks Lang, we are making progress! I no longer get the failed
assertion, but the code I'm using for vregs that don't get allocated a
preg, and thus need to be spilled and re-loaded is causing assembler errors.
I suspect the problem is my code for allocating space in the stack, but
I don't know how to fix it.
I've attached a new version of the simple register-allocation
2012 Nov 08
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
In x86-64 the REX prefix must be used to access an extended register
(r8-r15 and their aliases), but cannot be used when accessing the high byte
of the ABCD regs (AH, BH, CH, DH). In your test case you have hardcoded
%vreg1 to R8B, and %vreg15 to AH, and the test case contains a copy between
these registers. The copy simultaneously must have a REX prefix, and cannot
have a REX prefix,