similar to: [PATCH] x86/vmware: Skip lapic calibration on VMware.

The timer_irq_works() boot check may sometimes fail in a VM, when the Host is overcommitted or when the Guest is running nested. Since the intended check is unnecessary on VMware's virtual hardware, this change by-passes it. Signed-off-by: Renat Valiullin <rvaliullin at vmware.com> Acked-by: Alok N Kataria <akataria at vmware.com> --- arch/x86/kernel/cpu/vmware.c | 5 +++++ 1

The timer_irq_works() boot check may sometimes fail in a VM, when the Host is overcommitted or when the Guest is running nested. Since the intended check is unnecessary on VMware's virtual hardware, this change by-passes it. Signed-off-by: Renat Valiullin <rvaliullin at vmware.com> Acked-by: Alok N Kataria <akataria at vmware.com> --- arch/x86/kernel/cpu/vmware.c | 5 +++++ 1

Re-factor the vmware platform setup code to query the hypervisor for tsc frequency only once during boot. Since the VMware hypervisor guarantees constant TSC, calibrate_tsc now uses the saved value. Signed-off-by: Alexey Makhalov <amakhalov at vmware.com> Acked-by: Alok N Kataria <akataria at vmware.com> --- arch/x86/kernel/cpu/vmware.c | 37 ++++++++++++++++++------------------- 1

Re-factor the vmware platform setup code to query the hypervisor for tsc frequency only once during boot. Since the VMware hypervisor guarantees constant TSC, calibrate_tsc now uses the saved value. Signed-off-by: Alexey Makhalov <amakhalov at vmware.com> Acked-by: Alok N Kataria <akataria at vmware.com> --- arch/x86/kernel/cpu/vmware.c | 37 ++++++++++++++++++------------------- 1

Set pv_time_ops.sched_clock to vmware_sched_clock(). It is simplified version of native_sched_clock() without ring buffer of mult/shift/offset triplets and preempt toggling. Since VMware hypervisor provides constant tsc we can use constant mult/shift/offset triplet calculated at boot time. no-vmw-sched-clock kernel parameter is added to disable the paravirt sched clock. Signed-off-by: Alexey

Updated the VMWARE_PORT macro to use the new VMW_PORT macro. Doing this instead of replacing all existing instances of VMWARE_PORT to minimize code change. Signed-off-by: Sinclair Yeh <syeh at vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom at vmware.com> Reviewed-by: Alok N Kataria <akataria at vmware.com> Cc: Thomas Gleixner <tglx at linutronix.de> Cc: Ingo Molnar

Updated the VMWARE_PORT macro to use the new VMW_PORT macro. Doing this instead of replacing all existing instances of VMWARE_PORT to minimize code change. Signed-off-by: Sinclair Yeh <syeh at vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom at vmware.com> Reviewed-by: Alok N Kataria <akataria at vmware.com> Cc: Thomas Gleixner <tglx at linutronix.de> Cc: Ingo Molnar

Updated the VMWARE_PORT macro to use the new VMW_PORT macro. Doing this instead of replacing all existing instances of VMWARE_PORT to minimize code change. Signed-off-by: Sinclair Yeh <syeh at vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom at vmware.com> Reviewed-by: Alok N Kataria <akataria at vmware.com> Cc: Thomas Gleixner <tglx at linutronix.de> Cc: Ingo Molnar

Updated the VMWARE_PORT macro to use the new VMW_PORT macro. Doing this instead of replacing all existing instances of VMWARE_PORT to minimize code change. Signed-off-by: Sinclair Yeh <syeh at vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom at vmware.com> Reviewed-by: Alok N Kataria <akataria at vmware.com> Cc: Thomas Gleixner <tglx at linutronix.de> Cc: Ingo Molnar

Set pv_time_ops.sched_clock to vmware_sched_clock(). It is simplified version of native_sched_clock() without ring buffer of mult/shift/offset triplets and preempt toggling. Since VMware hypervisor provides constant tsc we can use constant mult/shift/offset triplet calculated at boot time. no-vmw-sched-clock kernel parameter is added to switch back to the native_sched_clock() implementation.

On Thu, 27 Oct 2016, Alexey Makhalov wrote: > [RESEND PATCH 1/3] x86/vmware: Use tsc_khz value for calibrate_cpu() Please don't do that. RESEND is a keyword, when the same patch (series) is sent again without any modification vs. the first patch (series). A possible reason to do so is when a patch (series) fell through the cracks and the author wants to bring it to attention again for the

Hi everyone! I''ve installed new Ruby 1.9.1 from sources (http://www.ruby-lang.org/en/), then "gem install rails", everything was ok during installation, all tests ("make test") were ok too. After all, i wanted to create my new RoR project, but I could not start it. Plz help me Here is my terminal: [renat@localhost rails]$ rails mysite create create

After aa297292d708, there are separate native calibrations for cpu_khz and tsc_khz. The code sets x86_platform.calibrate_cpu to native_calibrate_cpu() which looks in cpuid leaf 0x16 or msrs for the cpu frequency. Since we keep the tsc_khz constant (even after vmotion), the cpu_khz and tsc_khz may start diverging. tsc_init() now does cpu_khz = x86_platform.calibrate_cpu(); tsc_khz =

After aa297292d708, there are separate native calibrations for cpu_khz and tsc_khz. The code sets x86_platform.calibrate_cpu to native_calibrate_cpu() which looks in cpuid leaf 0x16 or msrs for the cpu frequency. Since we keep the tsc_khz constant (even after vmotion), the cpu_khz and tsc_khz may start diverging. tsc_init() now does cpu_khz = x86_platform.calibrate_cpu(); tsc_khz =

[PATCH 1/2] Support multiple C3 states. There may be multiple ACPI C3 states mapped into different CPU C-states.So made some modification to support this case. [PATCH 2/2] Handle C2 LAPIC timer & TSC stop. ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok''

Hi It seems that the Xen4.1''s HVM LAPIC clock for HVM fails to function normally, the guest OS cannot receive interrupts and Linux chooses to use PIT based TSC timer. Is there any change from Xen3.x with respect of this? Thanks - Zhefu _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel

ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok'' can be used to select simple C2 entry/exit only if the user make sure that LAPIC tmr & TSC will not be stopped during C2. Signed-off-by: Wei Gang <gang.wei@intel.com>

On Wed, 19 Jul 2017 16:48:23 +0800 (CST) <wang.yi59@zte.com.cn> wrote: > >* wang.yi59@zte.com.cn (wang.yi59@zte.com.cn) wrote: > > > >> Hi Eduardo, > > >> > > >> Thank you for your reply! > > >> > > >> >On Mon, Jul 17, 2017 at 09:49:37PM -0400, Yi Wang wrote: > > >> > >

Hi, When using lapic as timer source the hypervisor delivers timer interrupts late. In the source xen/arch/x86/hvm/vpt.c function create_periodic_time creates a timer element with a "bonus" of 50% of the desired time until the interrupt: pt->scheduled = NOW() + period; /* * Offset LAPIC ticks from other timer ticks. Otherwise guests which use * LAPIC ticks for

Local APIC timer may stop at deep C state (C3/C4...) entry/exit. this patch add the logic that use platform timer (HPET) to reenable local APIC timer at C state entry/exit. Signed-off-by: Wei Gang <gang.wei@intel.com> Signed-off-by: Yu Ke <ke.yu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com